Liquid crystal display, thin film transistor array, and method of fabricating same with storage capacitor providing high aspect ratio

• US 6,137,551 A
• Filed: 12/19/1997
• Issued: 10/24/2000
• Est. Priority Date: 02/20/1997
• Status: Expired due to Fees

• Current Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Original Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Inventors: Jeong, Kwoan-Yel
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): CHOWDHURY, TARIFUR RASHID
• Application Number:
  US08/994,436
• Time in Patent Office: 1,040 Days
• Field of Search: 349/38, 349/39, 349/42, 349/43, 349/187, 257/72, 257/59
• US Class Current: 349/38
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods

Abstract

A liquid crystal display includes a substrate, a plurality of gate lines disposed over the substrate, a plurality of data lines intersecting the plurality of gate lines over the substrate, and a plurality of switching elements each having an active layer formed of a semiconductor materials and connected to the gate line and the data line, operation of the switching element being controlled by signals from the gate line connected to the switching element. The liquid crystal display further includes a plurality of pixel electrodes each connected to each of the plurality of switching elements, signals from the data line being transmitted to the pixel electrode in accordance with the operation of the switching element, a storage electrode opposite to the pixel electrode, the storage electrode being formed of the same semiconductor material as that of the active layer, and at least one dielectric layer between the storage electrode and the opposing pixel electrode, the storage electrode and the opposing pixel electrode along with the at least one dielectric layer forming a storage capacitor.

Claims

1. A liquid crystal display, comprising:

a substrate;

a plurality of gate lines over the substrate;

a plurality of data lines crossing the plurality of gate lines over the substrate;

a plurality of switching elements each having an active layer formed of a semiconductor material over the substrate and connected to the gate line and the data line, signals from the gate lines controlling an operation of the switching elements;

a plurality of pixel electrodes each respectively connected to each of the plurality of switching elements, signals from the data lines being transmitted to the pixel electrodes in accordance with the operation of the switching elements;

a plurality of storage electrodes positioned opposite to the pixel electrodes, the storage electrodes being formed over the substrate of the same semiconductor material as that of the active layers such that the plurality of storage electrodes are substantially transparent; and

at least one dielectric layer between the storage electrode and the pixel electrode, the storage electrode and the pixel electrode along with the at least one dielectric layer defining a storage capacitor, wherein each storage electrode substantially covers an entire corresponding pixel region excluding a region where the respective switching element is formed.

2. The liquid crystal display according to claim 1, wherein the active layer includes a semiconductor material having one of amorphous silicon and polysilicon.

3. The liquid crystal display according to claim 1, wherein the switching element includes a thin film transistor having source and drain regions and a gate insulating layer and a gate electrode.

4. A thin film transistor array for use in a liquid crystal display, comprising:

a substrate;

a gate line over the substrate;

a data line over the substrate;

a thin film transistor over the substrate, including;

an active layer having source and drain regions therein, the active layer being made of a semiconductor material, the source region being connected to the data line;

a gate electrode connected to the gate line; and

a gate insulating layer between the gate electrode and the active layer;

a pixel electrode connected to the drain region of the active layer;

a storage electrode disposed opposite to the pixel electrode and made of the same semiconductor material as the active layer, the storage electrode being substantially transparent with respect to a radiation; and

a dielectric layer between the pixel electrode and the storage electrode, the pixel electrode and the storage electrode along with the dielectric layer defining a capacitor, wherein the storage electrode is formed over substantially an entire pixel region.

5. A thin film transistor array substrate according to claim 4, wherein the semiconductor material includes amorphous silicon.

6. A thin film transistor array substrate according to claim 4, wherein the semiconductor material includes polycrystalline silicon.

7. The thin film transistor array substrate according to claim 4, wherein the storage electrode is substantially transparent with respect to visible light.

8. The thin film transistor array substrate according to claim 4, wherein an area defined by the storage electrode is substantially the same as an area defined by the pixel electrode.

9. The thin film transistor array substrate according to claim 4, wherein the gate insulating layer is between the storage electrode and the pixel electrode.

10. The thin film transistor array substrate according to claim 4, wherein the dielectric layer includes a first insulating layer over the active layer and the storage electrode and a second insulating layer over the first insulating layer,

wherein the data line is over the first insulating layer and connected to the source region through a contact hole in the first insulating layer, and

wherein the pixel electrode is over the second insulating layer and connected to the drain region through a contact hole in the first and second insulating layers.

11. The thin film transistor array substrate according to claim 4, wherein the thickness of the storage electrode is less than 600 Å

.

12. The thin film transistor array substrate according to claim 11, wherein the thickness of the storage electrode is more than 400 Å

.

13. The thin film transistor array according to claim 4, wherein active layer and the storage electrode are both formed directly on a surface of the substrate.

14. The thin film transistor array according to claim 4, wherein active layer and the storage electrode are formed at a same layer with respect to the substrate.

15. The thin film transistor array according to claim 4, wherein the active layer and the storage electrode are both formed of a silicon thin film having a thickness between 400 Å

and 600 Å

.

16. The thin film transistor array according to claim 4, wherein the substrate includes a glass substrate.

17. A method of fabricating a liquid crystal display on a substrate, the method comprising the steps of:

simultaneously forming an active layer and a storage electrode over the substrate, the active layer and the storage electrode being made of a same semiconductor material being substantially transparent;

forming a first insulating layer over an overall surface of the substrate;

forming a gate electrode and a gate line connected to the gate electrode over the first insulating layer, the gate electrode crossing the active layer;

doping impurities into predetermined portions of the active layer and the storage electrode using the gate electrode and the gate line as a mask, the impurity-doped portions of the active layer defining source and drain regions at sides of the active region relative to the gate electrode;

forming a second insulating layer over an overall surface of the substrate;

forming a first contact hole in predetermined portions of the first and second insulating layers to expose a portion of the source region;

forming a data line over the second insulating layer, the data line being connected to the source region through the first contact hole;

forming a third insulating layer on an overall surface of the substrate;

forming a second contact hole in predetermined portions of the first, second, and third insulating layers to expose a portion of the drain region; and

forming a pixel electrode opposite to the storage electrode over the third insulating layer, the pixel electrode being connected to the drain region through the second contact hole, wherein the storage electrode is formed over substantially an entire pixel region.

18. The method according to claim 17, wherein the step of doping impurities includes the step of doping N-type impurity-ions.

19. The method according to claim 17, wherein the step of doping impurities includes the step of doping P-type impurity-ions.

20. The method according to claim 17, wherein the step of forming the active layer and the storage electrode includes the steps of

depositing amorphous silicon over the substrate;

and

patterning the amorphous silicon to form the active layer and the storage electrode.

21. The method according to claim 17, wherein the step of forming the active layer and the storage electrode includes the steps of:

depositing polycrystalline silicon over the substrate; and

patterning the polycrystalline silicon to form the active layer and the storage electrode.

22. The method according to claim 17, wherein the step of forming the active layer and the storage electrode includes the step of forming the storage electrode with a thickness of less than 600 Å

.

23. The method according to claim 17, wherein the active layer and the storage electrode are concurrently formed.

24. The method according to claim 17, wherein active layer and the storage electrode are both formed directly on a surface of the substrate.

25. The method according to claim 17, wherein active layer and the storage electrode are formed at a same layer with respect to the substrate.

26. The method according to claim 17, wherein the active layer and the storage electrode are both formed of a silicon thin film having a thickness between 400 Å

and 600 Å

.

27. The method according to claim 17, wherein the substrate includes a glass substrate.