Method of changing the power dissipation across an array of transistors
First Claim
1. A method of changing the power dissipation across an array of transistors comprising the step of forming the array of transistors such that transistors in a central portion of the array of transistors has a higher threshold voltage than transistors in an outer portion of the array of transistors.
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Accused Products
Abstract
A field effect transistor (30) has an array of transistors (31) made up of bonding pads (45-47) and sub-arrays of transistors (41-43). The bonding pads (45-47) are distributed between the sub-arrays of transistors (41-43) to reduce the maximum temperature that any portion of the FET (30) is exposed to while the FET (30) is in a conducting state. A similar effect can be appreciated by adjusting the threshold voltage or pinch-off resistance of the transistors in a portion (101) of an array of transistors (95).
23 Citations
2 Claims
- 1. A method of changing the power dissipation across an array of transistors comprising the step of forming the array of transistors such that transistors in a central portion of the array of transistors has a higher threshold voltage than transistors in an outer portion of the array of transistors.
Specification
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- Resources
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Current AssigneeNXP USA, Inc. (NXP Semiconductors NV)
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Original AssigneeMotorola, Inc. (Motorola Solutions, Inc.)
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InventorsBaird, Robert W., Merchant, Steven L., Dupuy, Phillipe
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Primary Examiner(s)DUTTON, BRIAN KEITH
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Application NumberUS09/088,027Time in Patent Office883 DaysField of Search257/401, 438/275, 438/289US Class Current438/275CPC Class CodesH01L 27/0211 adapted for requirements of...
