Autonomous battery equalization circuit

• US 6,140,800 A
• Filed: 05/27/1999
• Issued: 10/31/2000
• Est. Priority Date: 05/27/1999
• Status: Expired due to Term

• Current Assignee: BAE Systems Controls Incorporated (BAE Systems Plc)
• Original Assignee: BAE Systems Controls Incorporated (BAE Systems Plc)
• Inventors: Peterson, William Anders
• Primary Examiner(s): Tso, Edward H.
• Assistant Examiner(s): TOATLEY, GREGORY J
• Application Number:
  US09/320,689
• Time in Patent Office: 523 Days
• Field of Search: 320/118, 320/119, 320/116, 320/128, 320/103
• US Class Current: 320/118
• CPC Class Codes: H02J 7/0018 using separate charge circuits
• CPC Class Codes: Y02E 60/10 Energy storage using batteries
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

A battery equalization circuit for equalizing charge between at least first and second series connected batteries includes a switching circuit and a resonant circuit. Each battery has a positive end and a negative end, where the positive end of the second battery is coupled to the negative end of the first battery at a common node. The switching circuit is connectable to (i) the positive end of the first battery at a positive node, and (ii) the negative end of the second battery at a negative node; and the resonant circuit is connectable between the switching circuit and the common node of the batteries, wherein the switching circuit is adapted to alternately couple the resonant circuit in parallel with the first and second batteries such that a DC current component flows between the first and second batteries through the resonant circuit as a function of a charge imbalance therebetween.

Claims

1. A battery equalization circuit for equalizing charge between at least first and second series connected batteries, each battery including a positive end and a negative end, where the positive end of the second battery is coupled to the negative end of the first battery at a common node, the battery equalization circuit comprising:

a switching circuit connectable to (i) the positive end of the first battery at a positive node, and (ii) the negative end of the second battery at a negative node; and

a resonant circuit connectable between the switching circuit and the common node of the batteries,

wherein the switching circuit is adapted to alternately couple the resonant circuit in parallel with the first and second batteries such that a DC current component flows between the first and second batteries through the resonant circuit as a function of a charge imbalance therebetween.

2. The battery equalization circuit of claim 1, wherein the DC current component flows at least one of:

(i) from the first battery to the second battery when the first battery has a charge greater than a charge on the second battery; and

(ii) from the second battery to the first battery when the first battery has a charge less than the charge on the second battery,

wherein the DC current component tends to equalize the charge between the first and second batteries.

3. The battery equalization circuit of claim 2, wherein the DC current component has a magnitude proportional to a difference in magnitude between the respective charges on the first and second batteries.

4. The battery equalization circuit of claim 3, wherein the resonant circuit is a series resonant circuit including a resonant inductor coupled in series with a resonant capacitor.

5. The battery equalization circuit of claim 4, wherein the series coupled resonant inductor and resonant capacitor include a first node connected to the switching circuit, a second node connectable to the common node of the batteries, and an intermediate node connecting the resonant inductor to the resonant capacitor.

6. The battery equalization circuit of claim 5, wherein the series resonant circuit includes a DC bypass circuit connected across the resonant capacitor such that the DC current component may flow therethrough and into one of the first and second batteries.

7. The battery equalization circuit of claim 6, wherein the DC bypass circuit includes a bypass inductor, the bypass inductor having an inductance substantially larger than the resonant inductor.

8. The battery equalization circuit of claim 7, wherein imbalances between the respective charges on the first and second batteries tends to induce a DC voltage component across the resonant capacitor, the bypass inductor providing a DC current path across the resonant capacitor such that the DC current component may flow through the bypass inductor and into one of the first and second batteries.

9. The battery equalization circuit of claim 5, wherein the switching circuit includes first and second switching transistors coupled in a half bridge configuration from the positive node to the negative node and defining an output node therebetween, the first node of the resonant circuit being coupled to the output node.

10. The battery equalization circuit of claim 9, wherein the switching circuit includes a transistor drive circuit adapted to produce first and second bias signals for turning the first and second switching transistors on and off, respectively, the transistor drive circuit being coupled to the resonant inductor such that the first and second bias signals are a function of a voltage across the resonant inductor.

11. The battery equalization circuit of claim 10, wherein the transistor drive circuit produces the first bias signal to (i) bias the first transistor on and the second transistor off when the voltage across the resonant inductor is generally positive, (ii) bias the first transistor off and the second transistor on when the voltage across the resonant inductor is generally negative.

12. The battery equalization circuit of claim 11, wherein the transistor drive circuit includes first and second windings wound on a common core of the resonant inductor, the first and second windings being wound oppositely with respect to one another and coupled to bias terminals of the first and second switching transistors, respectively.

13. The battery equalization circuit of claim 12, wherein the first and second switching transistors are MOS gated transistors, each having gating terminals, the first and second windings being coupled to the respective gating terminals.

14. The battery equalization circuit of claim 13, wherein the first and second switching transistors are MOSFETs, a source of the first switching transistor being coupled to a drain of the second switching transistor at the output node, the first and second windings being coupled from respective gates to sources of the first and second switching transistors.

15. The battery equalization circuit of claim 11, wherein the transistor drive circuit is adapted such that the voltage across the resonant inductor induces proportional bias voltages for biasing the first and second switching transistors on and off in a positive feedback arrangement.

16. The battery equalization circuit of claim 15, wherein each switching transistor has a threshold voltage of a magnitude below which the switching transistor will be biased off, the positive feedback of the transistor drive circuit operating such that as the magnitude of the voltage across the resonant inductor approaches zero, one of the bias voltages approaches the respective threshold voltage tending to (i) bias the corresponding switching transistor off, (ii) cause reduced current through the resonant inductor, (iii) cause reversal of the voltage across the resonant inductor, and (iv) cause the bias voltage to fall below the respective threshold voltage and fully bias the corresponding switching transistor off.

17. The battery equalization circuit of claim 16, wherein reactive values of the resonant inductor and resonant capacitor define a resonant frequency, the positive feedback of the transistor drive circuit causing the current through, and the voltages across, the resonant inductor and resonant capacitor to exhibit a frequency slightly above the resonant frequency.

18. The battery equalization circuit of claim 8, further comprising first and second bypass capacitors, the first bypass capacitor coupled from the positive node to the common node and the second bypass capacitor coupled from the common node to the negative node.

19. The battery equalization circuit of claim 18, wherein the first and second bypass capacitors have reactive values sufficient to shunt circulating currents from the resonant circuit from flowing in the respective batteries.

20. The battery equalization circuit of claim 8, further comprising first and second bypass diodes having respective anodes and cathodes, the first diode being coupled with its anode from the intermediate node of the resonant circuit to the positive node, and the second diode being coupled with its cathode from the intermediate node of the resonant circuit to the negative node, the first and second diodes preventing a voltage at the intermediate node from rising substantially above the first battery voltage or falling substantially below the second battery voltage.

21. A battery equalization circuit for equalizing charge between at least first and second series connected battery cells, each battery cell including a positive end and a negative end, where the positive end of the second battery cell is coupled to the negative end of the first battery cell at a common node, the battery equalization circuit comprising:

a switching circuit connectable to (i) the positive end of the first battery cell at a positive node, and (ii) the negative end of the second battery cell at a negative node; and

a resonant circuit connectable between the switching circuit and the common node of the battery cells,

wherein the switching circuit is adapted to alternately couple the resonant circuit in parallel with the first and second battery cells such that a DC current component flows between the first and second battery cells through the resonant circuit as a function of a charge imbalance therebetween.

22. The battery equalization circuit of claim 21, wherein each of the first and second battery cells include two or more sub-cells forming the respective battery cell.

23. The battery equalization circuit of claim 21, wherein the resonant circuit is a series resonant circuit including a resonant inductor coupled in series with a resonant capacitor.

24. The battery equalization circuit of claim 23, wherein the series coupled resonant inductor and resonant capacitor include a first node connected to the switching circuit, a second node connectable to the common node of the battery cells, and an intermediate node connecting the resonant inductor to the resonant capacitor.

25. The battery equalization circuit of claim 24, wherein the series resonant circuit includes a DC bypass circuit connected across the resonant capacitor such that the DC current component may flow therethrough and into one of the first and second battered cells.

26. The battery equalization circuit of claim 25, wherein the DC bypass circuit includes a bypass inductor, the bypass inductor having an inductance substantially larger than the resonant inductor.

27. The battery equalization circuit of claim 26, wherein imbalances between the respective charges on the first and second batteries tends to induce a DC voltage component across the resonant capacitor, the bypass inductor providing a DC current path across the resonant capacitor such that the DC current component may flow through the bypass inductor and into one of the first and second battery cells.

28. The battery equalization circuit of claim 25, wherein the switching circuit includes first and second switching transistors coupled in a half bridge configuration from the positive node to the negative node and defining an output node therebetween, the first node of the resonant circuit being coupled to the output node.

29. The battery equalization circuit of claim 28, wherein the switching circuit includes a transistor drive circuit adapted to produce first and second bias signals for turning the first and second switching transistors on and off, respectively, the transistor drive circuit being coupled to the resonant inductor such that the first and second bias signals are a function of a voltage across the resonant inductor.

30. The battery equalization circuit of claim 29, wherein the transistor drive circuit produces the first bias signal to (i) bias the first transistor on and the second transistor off when the voltage across the resonant inductor is generally positive, (ii) bias the first transistor off and the second transistor on when the voltage across the resonant inductor is generally negative.

31. The battery equalization circuit of claim 30, wherein the transistor drive circuit includes first and second windings wound on a common core of the resonant inductor, the first and second windings being wound oppositely with respect to one another and coupled to bias terminals of the first and second switching transistors, respectively.

32. The battery equalization circuit of claim 31, wherein the first and second switching transistors are MOS gated transistors, each having gating terminals, the first and second windings being coupled to the respective gating terminals.

33. The battery equalization circuit of claim 32, wherein the first and second switching transistors are MOSFETs, a source of the first switching transistor being coupled to a drain of the second switching transistor at the output node, the first and second windings being coupled from respective gate, to sources of the first and second switching transistors.

34. The battery equalization circuit of claim 21, further comprising first and second bypass capacitors, the first bypass capacitor coupled from the positive node to the common node and the second bypass capacitor coupled from the common node to the negative node.

35. The battery equalization circuit of claim 34, wherein the first and second bypass capacitors have reactive values sufficient to shunt circulating currents from the resonant circuit from flowing in the respective battery cells.

36. The battery equalization circuit of claim 21, further comprising first and second bypass diodes having respective anodes and cathodes, the first diode being coupled with its anode from the intermediate node of the resonant circuit to the positive node, and the second diode being coupled with its cathode from the intermediate node of the resonant circuit to the negative node.