DC-to-DC converter with transient suppression

• US 6,140,808 A
• Filed: 08/05/1998
• Issued: 10/31/2000
• Est. Priority Date: 08/05/1998
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Massie, Howard L.
• Primary Examiner(s): Wong, Peter S.
• Assistant Examiner(s): Laxton, Gary L.
• Application Number:
  US09/130,524
• Time in Patent Office: 818 Days
• Field of Search: 323/282, 323/283, 323/284, 323/222, 323/224
• US Class Current: 323/284
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel

Abstract

A DC-to-DC converter includes: a first circuit to sense when the converter output voltage occurs outside a substantially pre-determined range, and a second circuit to adjust the converter load current, based at least in part, upon a signal provided by the first circuit. Alternatively, a circuit to suppress voltage transients for use in a DC-to-DC converter having a primary inductor includes: another circuit inductance lower than the inductance of the primary inductor. The another circuit inductance is coupled in the circuit to be activated when the load voltage of the DC-to-DC converter occurs outside a substantially predetermined range. The another circuit inductance is further coupled in the circuit so that it has the capability to modify the load current during activation.

Claims

1. A circuit, to suppress voltage transients for use in a DC-to-DC converter having a primary inductor, comprising:

another circuit inductance lower than the inductance of the primary inductor;

said another circuit inductance being coupled in said circuit to be activated when a voltage of the DC-to-DC converter occurs outside a substantially predetermined range;

said another circuit inductance being further coupled so that while said circuit is in operation said another circuit inductance modifies a load current during activation.

2. The circuit of claim 1, wherein the DC-to-DC converter includes a primary inductor having an inductance sufficient so that said converter is able to convert an input DC voltage to an output DC voltage approximately an order of magnitude smaller or less.

3. The circuit of claim 1, wherein said another circuit inductance is coupled in said circuit to apply ripple regulation to modify the load current.

4. The circuit of claim 3, wherein said circuit includes comparators to sense when the load voltage occurs outside a substantially predetermined range.

5. The circuit of claim 4, wherein said circuit includes said another circuit inductance coupled in said circuit so as to apply ripple regulation to modify the load current based, at least in part, upon output signals of the comparators of said circuit.

6. The circuit of claim 1, wherein said circuit includes comparators to sense when the load voltage occurs outside a substantially predetermined range.

7. A method of suppressing a voltage transient in a DC-to-DC converter comprising:

sensing when a converter load voltage occurs outside a substantially predetermined range; and

adjusting a converter load current in response to a sensed load voltage being outside the substantially predetermined range;

wherein adjusting the load current comprises employing an inductance to source and sink current that has an inductance smaller than the inductance of a primary inductor of the DC-to-DC converter.

8. The method of claim 7, wherein employing an inductance to source and sink current that has an inductance smaller than the inductance of the primary inductor of the DC-to-DC converter comprises applying ripple regulation using the inductance to source and sink current.

9. The method of claim 8, wherein the DC-to-DC converter comprises a buck converter configuration.