Boosting circuit with boosted voltage limited

• US 6,141,262 A
• Filed: 04/07/1999
• Issued: 10/31/2000
• Est. Priority Date: 04/24/1998
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Corporation
• Inventors: Sudo, Naoaki
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): LE, THONG QUOC
• Application Number:
  US09/287,285
• Time in Patent Office: 573 Days
• Field of Search: 365/189.09, 365/189.11, 365/189.08, 365/226, 365/241
• US Class Current: 365/189.09
• CPC Class Codes: G11C 16/08 Address circuits; Decoders; Word-line control circuits
• CPC Class Codes: G11C 8/08 Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Abstract

A boosting circuit includes a plurality of boosting circuit units, a voltage detecting circuit and a boost control circuit. The plurality of boosting circuit units have their outputs connected together and respectively having voltage boosting functions. Each of the plurality of boosting circuit units generates a boosted voltage higher than a power supply voltage in response to a drive signal. The voltage detecting circuit detects whether or not the boosted voltage is higher than a predetermined voltage, to generate a voltage control signal when it is detected that the boosted voltage is higher than a predetermined voltage. The boost control circuit limits the voltage boosting functions of predetermined ones of the plurality of boosting circuit units in response to the voltage control signal.

Claims

1. A boosting circuit comprising:

a plurality of boosting circuit units having their outputs connected together and respectively having voltage boosting functions, for generating a boosted voltage higher than a power supply voltage in response to a drive signal;

voltage detecting circuit for detecting whether or not said boosted voltage is higher than a predetermined voltage, to generate a voltage control signal when it is detected that said boosted voltage is higher than said predetermined voltage; and

a boost control circuit for limiting said voltage boosting functions of at least a predetermined boosting circuit unit of said plurality of boosting circuit units in response to said voltage control signal,

wherein at least a remaining boosting circuit unit of said plurality of boosting circuit units other than said predetermined boosting circuit unit continues to perform said voltage boosting functions.

2. The boosting circuit according to claim 1, wherein said plurality of boosting circuit units comprise first and second boosting circuit units, and

wherein said second boosting circuit unit is said predetermined boosting circuit unit.

6. The boosting circuit according to claim 1, wherein said boost control circuit stops said voltage boosting functions of said predetermined boosting circuit unit to limit said voltage boosting functions.

7. The boosting circuit according to claim 1, wherein said boosting circuit is contained in a semiconductor memory device having word lines for a memory cell array, and

said drive signal is generated in response to switching of an address, and

said boosted voltage is applied to one of said word lines corresponding to said address.

3. A boosting circuit comprising:

a plurality of boosting circuit units having their outputs connected together and respectively having voltage boosting functions, for generating a boosted voltage higher than a power supply voltage in response to a drive signal;

a voltage detecting circuit for detecting whether or not said boosted voltage is higher than a predetermined voltage, to generate a voltage control signal when it is detected that said boosted voltage is higher than said predetermined voltage; and

a boost control circuit for limiting said voltage boosting functions of at least a predetermined boosting circuit unit of said plurality of boosting circuit units in response to said voltage control signal,

wherein said plurality of boosting circuit units comprise first and second boosting circuit units, and

wherein said second boosting circuit unit is said predetermined boosting circuit unit, and

wherein said first boosting circuit unit includes a first capacitor having a first capacitance and said second boosting circuit unit includes a second capacitor having a second capacitance, wherein said first and second capacitors are used for said voltage boosting functions, and said first capacitance is larger than said second capacitance.

4. A boosting circuit comprising:

a plurality of boosting circuit units having their outputs connected together and respectively having voltage boosting functions, for generating a boosted voltage higher than a power supply voltage in response to a drive signal;

a voltage detecting circuit for detecting whether or not said boosted voltage is higher than a predetermined voltage, to generate a voltage control signal when it is detected that said boosted voltage is higher than said predetermined voltage; and

a boost control circuit for limiting said voltage boosting functions of at least a predetermined boosting circuit unit of said plurality of boosting circuit units in response to said voltage control signal,

wherein said plurality of boosting circuit units comprise first, second, and third boosting circuit units, and said predetermined boosting circuit unit is said third boosting circuit unit.

5. The boosting circuit according to claim 4, wherein said first, second, and third boosting circuit units have capacitors which have a same capacitance.

8. A method of boosting a voltage comprising:

generating a boosting voltage higher than a power supply voltage in response to a drive signal by a plurality of boosting circuit units having their outputs connected together and respectively having voltage boosting functions;

detecting whether or not said boosted voltage is higher than a predetermined voltage, to generate a voltage control signal when it is detected that said boosted voltage is higher than said predetermined voltage; and

limiting said voltage boosting functions of at least a predetermined boosted circuit unit of said plurality of boosting circuit units in response to said voltage control signal,

wherein said limiting operation includes continuing to perform said voltage boosting functions in at least a remaining boosting circuit of said plurality of boosting circuit units other than said predetermined boosting circuit unit.

11. The method according to claim 8, wherein said limiting operation includes stopping said voltage boosting functions of said predetermined boosting circuit unit.

12. The method according to claim 8, wherein said boosting circuit is contained in a semiconductor memory device having word lines for a memory cell array, and

said method further comprising:

generating said drive signal in response to switching of an address; and

applying said boosted voltage to one of said word lines corresponding to said address.

9. A method of boosting a voltage, comprising:

generating a boosting voltage higher than a power supply voltage in response to a drive signal by a plurality of boosting circuit units having their outputs connected together and respectively having voltage boosting functions;

detecting whether or not said boosted voltage is higher than a predetermined voltage, to generate a voltage control signal when it is detected that said boosted voltage is higher than said predetermined voltage; and

limiting said voltage boosting functions of at least a predetermined boosted circuit unit of said plurality of boosting circuit units in response to said voltage control signal,

wherein said plurality of boosting circuit units comprise first and second boosting circuit units, and said second boosting circuit unit is said predetermined boosting circuit unit,

wherein said first boosting circuit includes a first capacitor having a first capacitance and said second boosting circuit unit includes a second capacitor having a second capacitance, and

wherein said first and second capacitors perform said voltage boosting functions, and said first capacitance is larger than said second capacitance.

10. A method of boosting a voltage, comprising:

generating a boosting voltage higher than a power supply voltage in response to a drive signal by a plurality of boosting circuit units having their outputs connected together and respectively having voltage boosting functions;

detecting whether or not said boosted voltage is higher than a predetermined voltage, to generate a voltage control signal when it is detected that said boosted voltage is higher than said predetermined voltage; and

limiting said voltage boosting functions of at least a predetermined boosted circuit unit of said plurality of boosting circuit units in response to said voltage control signal,

wherein said plurality of boosting circuit units comprise first, second, and third boosting circuit units, and said predetermined boosting circuit unit is said third boosting circuit unit, and

wherein said first, second, and third boosting circuit units have capacitors which have a same capacitance.

13. A boosting circuit comprising:

a plurality of boosting circuit units each of which includes a capacitor, and whose outputs are connected together, wherein said capacitors are used for a voltage boosting function to generate a boosted voltage higher than a power supply voltage in response to a drive signal to charge a load capacitor;

a voltage detecting circuit for detecting whether or not said boosted voltage is higher than a predetermined voltage, to generate a voltage control signal when it is detected that said boosted voltage is higher than said predetermine voltage; and

a boost control circuit for limiting said voltage boosting functions of at least a predetermined boosting circuit unit of said plurality of boosting circuit units in response to said voltage control signal, such that said capacitor of said predetermined boosting circuit unit is operated as an additional load capacitor to be charged with the boosted voltage,

wherein at least a remaining boosting circuit unit of said plurality of boosting circuit units other than said predetermined boosting circuit unit continues to perform said voltage boosting functions.

14. The boosting circuit according to claim 13, wherein said plurality of boosting circuit units comprise first and second boosting circuit units, and said second boosting circuit unit is said predetermined boosting circuit unit.

18. The boosting circuit according to claim 13, wherein said boost control circuit stops said voltage boosting functions of said predetermined boosting circuit unit to limit said voltage boosting functions.

19. The boosting circuit according to claim 13, wherein said boosting circuit is contained in a semiconductor memory device having word lines for a memory cell array, and

said drive signal is generated in response to switching of an address, and

said boosted voltage is applied to one of said word lines correspond to said address.

15. A boosting circuit, comprising:

a plurality of boosting circuit units each of which includes a capacitor, and whose outputs are connected together, wherein said capacitors are used for a voltage boosting function to generate a boosted voltage higher than a power supply voltage in response to a drive signal to charge a load capacitor;

a voltage detecting circuit for detecting whether or not said boosted voltage is higher than a predetermined voltage, to generate a voltage control signal when it is detected that said boosted voltage is higher than said predetermine voltage; and

a boost control circuit for limiting said voltage boosting functions of at least a predetermined boosting circuit unit of said plurality of boosting circuit units in response to said voltage control signal, such that said capacitor of said predetermined boosting circuit unit is operated as an additional load capacitor to be charged with the boosted voltage,

wherein said plurality of boosting circuit units comprise first and second boosting circuit units, and said second boosting circuit unit is said predetermined boosting circuit unit, and

wherein said first boosting circuit unit includes a first capacitor having a first capacitance and said second boosting circuit unit includes a second capacitor having a second capacitance, and said first capacitance is larger than said second capacitance.

16. A boosting circuit, comprising:

a plurality of boosting circuit units each of which includes a capacitor, and whose outputs are connected together, wherein said capacitors are used for a voltage boosting function to generate a boosted voltage higher than a power supply voltage in response to a drive signal to charge a load capacitor;

a voltage detecting circuit for detecting whether or not said boosted voltage is higher than a predetermined voltage, to generate a voltage control signal when it is detected that said boosted voltage is higher than said predetermine voltage; and

a boost control circuit for limiting said voltage boosting functions of at least a predetermined boosting circuit unit of said plurality of boosting circuit units in response to said voltage control signal, such that said capacitor of said predetermined boosting circuit unit is operated as an additional load capacitor to be charged with the boosted voltage,

wherein said plurality of boosting circuit units comprise first, second, and third boosting circuit units, and said predetermined boosting circuit unit is said third boosting circuit unit.

17. The boosting circuit according to claim 16, wherein said first, second, and third boosting circuit units have capacitors which have a same capacitance.

20. A boosting circuit comprising:

a first boosting circuit that outputs a first voltage via a first output;

a second boosting circuit that outputs a second voltage via a second output, wherein said first and second outputs are at least indirectly connected together so that a boosted voltage is formed based on said first voltage and said second voltage;

a voltage detecting circuit that detects whether or not said boosted voltage is higher than a predetermined voltage and generates a voltage control signal when said boosted voltage is higher than said predetermined voltage; and

a boost control circuit that limits said second voltage output from said second boosting circuit in response to said voltage control signal,

wherein said boosted voltage continues to be formed from said first voltage output from said first boosting circuit when said boost control circuit limits said second voltage output from said second boosting circuit.

21. A boosting circuit, comprising:

a first boosting circuit that outputs a first voltage via a first output;

a second boosting circuit that outputs a second voltage via a second output, wherein said first and second outputs are at least indirectly connected together so that a boosted voltage is formed based on said first voltage and said second voltage;

a voltage detecting circuit that detects whether or not said boosted voltage is higher than a predetermined voltage and generates a voltage control signal when said boosted voltage is higher than said predetermined voltage; and

a boost control circuit that limits said second voltage output from said second boosting circuit in response to said voltage control signal,

wherein said first boosting circuit comprises a first capacitor having a first capacitance and said second boosting circuit comprises a second capacitor having a second capacitance,

wherein said first capacitor is used to create said first voltage and said second capacitor is used to create said second voltage, and

wherein said first capacitance of said first capacitor is larger than said second capacitance of said second capacitor.

22. A boosting circuit, comprising:

a first boosting circuit that outputs a first voltage via a first output;

a second boosting circuit that outputs a second voltage via a second output, wherein said first and second outputs are at least indirectly connected together so that a boosted voltage is formed based on said first voltage and said second voltage;

a voltage detecting circuit that detects whether or not said boosted voltage is higher than a predetermined voltage and generates a voltage control signal when said boosted voltage is higher than said predetermined voltage;

a boost control circuit that limits said second voltage output from said second boosting circuit in response to said voltage control signal; and

a third boosting circuit that outputs a third voltage via a third output, wherein said first, second, and third outputs are at least indirectly connected together so that said boosted voltage is formed based on said first, second, and third voltages.

23. The boosting circuit as claimed in claim 22, wherein said first, second, and third boosting circuits comprise first, second, and third capacitors having first, second, and third capacitances, respectively,

wherein said first, second, and third capacitors are used to create said first, second, and third voltages, respectively, and

wherein said first, second, and third capacitances are substantially equal.

24. A boosting circuit, comprising:

a first boosting circuit that outputs a first voltage via a first output;

a second boosting circuit that outputs a second voltage via a second output, wherein said first and second outputs are at least indirectly connected together so that a boosted voltage is formed based on said first voltage and said second voltage;

a voltage detecting circuit that detects whether or not said boosted voltage is higher than a predetermined voltage and generates a voltage control signal when said boosted voltage is higher than said predetermined voltage;

a boost control circuit that limits said second voltage output from said second boosting circuit in response to said voltage control signal,

wherein said second boosting circuit comprises;

a first gate that inputs a first boosting signal and outputs a first gated boosting signal; and

a first capacitor that at least indirectly inputs said first gated boosting signal and at least indirectly outputs said second voltage.

25. The boosting circuit as claimed in claim 24, wherein said boost control circuit comprises:

a control gate that at least indirectly inputs a drive signal and said voltage control signal and at least indirectly outputs said first boosting signal based on a predetermined relationship between said drive signal and said voltage control signal.

26. The boosting circuit as claimed in claim 25, wherein said first gate is an inverter and said control gate is a NAND gate.

27. A boosting circuit, comprising:

a first boosting circuit that outputs a first voltage via a first output;

a second boosting circuit that outputs a second voltage via a second output, wherein said first and second outputs are at least indirectly connected together so that a boosted voltage is formed based on said first voltage and said second voltage;

a voltage detecting circuit that detects whether or not said boosted voltage is higher than a predetermined voltage and generates a voltage control signal when said boosted voltage is higher than said predetermined voltage;

a boost control circuit that limits said second voltage output from said second boosting circuit in response to said voltage control signal,

wherein said first boosting circuit comprises;

a first gate that inputs a first boosting signal and outputs a first gated boosting signal; and

a first capacitor that at least indirectly inputs said first gated boosting signal and at least indirectly outputs said first voltage, and

wherein said second boosting circuit comprises;

a second gate that inputs a second boosting signal and outputs a second gated boosting signal; and

a second capacitor that at least indirectly inputs said second gated boosting signal and at least indirectly outputs said second voltage.

28. The boosting circuit as claimed in claim 27, wherein said boost control circuit inputs a drive signal and said voltage control signal outputs said first boosting signal based on said drive signal, and

wherein said boost control circuit outputs said second boosting signal based on a predetermined relationship between said drive signal and said voltage control signal.

29. The boosting circuit as claimed in claim 28, wherein said boost control circuit comprises:

a control gate that at least indirectly inputs said drive signal and said voltage control signal and at least indirectly outputs said second boosting signal based on said predetermined relationship between said drive signal and said voltage control signal.

30. The boosting circuit as claimed in claim 29, wherein said first gate is an inverter, said second gate is an inverter, and said control gate is a NAND gate.

31. A method of boosting a voltage comprising:

outputting a first voltage from a first output of a first boosting circuit;

outputting a second voltage from a second output of a second boosting circuit;

forming a boosted voltage based on said first voltage and said second voltage;

detecting whether or not said boosted voltage is higher than a predetermined voltage;

generating a voltage control signal when said boosted voltage is higher than said predetermined voltage; and

limiting said second voltage output from said second boosting circuit in response to said voltage control signal,

wherein said boosted voltage continues to be formed from said first voltage output from said first boosting circuit when said second voltage output from said second boosting circuit is limited.

32. A method of boosting a voltage, comprising:

outputting a first voltage from a first output of a first boosting circuit;

outputting a second voltage from a second output of a second boosting circuit;

forming a boosted voltage based on said first voltage and said second voltage;

detecting whether or not said boosted voltage is higher than a predetermined voltage;

generating a voltage control signal when said boosted voltage is higher than said predetermined voltage;

limiting said second voltage output from said second boosting circuit in response to said voltage control signal; and

outputting a third voltage from a third output of a third boosting circuit, wherein said boosted voltage is formed based on said first, second, and third voltages.

33. A method of boosting a voltage, comprising:

outputting a first voltage from a first output of a first boosting circuit;

outputting a second voltage from a second output of a second boosting circuit;

forming a boosted voltage based on said first voltage and said second voltage;

detecting whether or not said boosted voltage is higher than a predetermined voltage;

generating a voltage control signal when said boosted voltage is higher than said predetermined voltage;

limiting said second voltage output from said second boosting circuit in response to said voltage control signal;

inputting a first boosting signal to a first gate of said second boosting circuit and outputting a first gated boosting signal from said first gate; and

at least indirectly inputting said first gated boosting signal to a first capacitor of said second boosting circuit and at least indirectly outputting said second voltage from said first capacitor.

34. The method as claimed in claim 33, further comprising:

at least indirectly inputting a drive signal and said voltage control signal to a control gate of a boost control circuit;

at least indirectly outputting said first boosting signal from said control gate based on a predetermined relationship between said drive signal and said voltage control signal.

35. The method as claimed in claim 34, wherein said first gate is an inverter and said control gate is a NAND gate.

36. A method of boosting a voltage, comprising:

outputting a first voltage from a first output of a first boosting circuit;

outputting a second voltage from a second output of a second boosting circuit;

forming a boosted voltage based on said first voltage and said second voltage;

detecting whether or not said boosted voltage is higher than a predetermined voltage;

generating a voltage control signal when said boosted voltage is higher than said predetermined voltage;

limiting said second voltage output from said second boosting circuit in response to said voltage control signal;

inputting a first boosting signal to a first gate of said first boosting circuit and outputting a first gated boosting signal from said first gate;

at least indirectly inputting said first gated boosting signal to a first capacitor and at least indirectly outputting said first voltage from said first capacitor;

inputting a second boosting signal to a second gate of said second boosting circuit and outputting a second gated boosting signal from said second gate; and

at least indirectly inputting said second gated boosting signal to a second capacitor and at least indirectly outputting said second voltage from said second capacitor.

37. The method as claimed in claim 36, further comprising:

inputting a drive signal and said voltage control signal to a boost control circuit;

outputting said first boosting signal from said boost control circuit based on said drive signal, and

outputting said second boosting signal from said boost control signal based on a predetermined relationship between said drive signal and said voltage control signal.