Pseudorandom binary sequence block shifter
First Claim
Patent Images
1. A method of restoring a linear feedback shift register to a state that it had N clock pulses prior to a present state, N being an integer greater than or equal to 1, comprising:
- determining a first inverse transition matrix for the linear feedback shift register such that modulo-2 multiplication of a current binary vector contained in the linear feedback shift register by the first inverse transition matrix produces a binary vector that was contained in the linear feedback shift register prior to the clock pulse which advanced the linear feedback shift register to its current binary vector;
determining a second inverse transition matrix which is the first inverse transition matrix raised to a power J where J is an integer, andif J is equal to N, multiplying in modulo-2 arithmetic the second inverse transition matrix by the current binary vector to produce the binary vector that was contained in the linear feedback shift register N clock pulses prior to the present state; and
loading the binary vector into the linear feedback shift register.
4 Assignments
0 Petitions
Accused Products
Abstract
A method and apparatus for determining the state, at any time in the past, relative to a present state, of a linear feedback shift register comprises determining a an inverse transition matrix which, if multiplied by the current state in modulo-2 arithmetic, yields the state one step into the past; and multiplying in modulo-2 arithmetic the present state of the linear feedback shift register by the inverse transition matrix N times to obtain the state N steps into the past.
-
Citations
28 Claims
-
1. A method of restoring a linear feedback shift register to a state that it had N clock pulses prior to a present state, N being an integer greater than or equal to 1, comprising:
-
determining a first inverse transition matrix for the linear feedback shift register such that modulo-2 multiplication of a current binary vector contained in the linear feedback shift register by the first inverse transition matrix produces a binary vector that was contained in the linear feedback shift register prior to the clock pulse which advanced the linear feedback shift register to its current binary vector; determining a second inverse transition matrix which is the first inverse transition matrix raised to a power J where J is an integer, and if J is equal to N, multiplying in modulo-2 arithmetic the second inverse transition matrix by the current binary vector to produce the binary vector that was contained in the linear feedback shift register N clock pulses prior to the present state; and loading the binary vector into the linear feedback shift register. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. Apparatus for restoring a linear feedback shift register to a state that it had N clock pulses prior to a present state, N being an integer greater than or equal to 1, comprising:
-
means for determining a first inverse transition matrix for the linear feedback shift register such that modulo-2 multiplication of a current binary vector contained in the linear feedback shift register by the first inverse transition matrix produces a binary vector that was contained in the linear feedback shift register prior to the clock pulse which advanced the linear feedback shift register to its current binary vector; means for determining a second inverse transition matrix which is the first inverse transition matrix raised to a power J where J is an integer; means for determining whether J is equal to N; means for multiplying, if J is equal to N, in modulo-2 arithmetic the second inverse transition matrix by the current binary vector to produce the binary vector that was contained in the linear feedback shift register N clock pulses prior to the present state; and means for loading, if J is equal to N, the binary vector into the linear feedback shift register. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
-
-
19. Apparatus for restoring a linear feedback shift register to a state that it had N clock pulses prior to a present state, N being an integer greater than or equal to 1, comprising:
-
a logic device for determining a first inverse transition matrix for the linear feedback shift register such that modulo-2 multiplication of a current binary vector contained in the linear feedback shift register by the first inverse transition matrix produces a binary vector that was contained in the linear feedback shift register prior to the clock pulse which advanced the linear feedback shift register to its current binary vector; the logic device being further adapted to determine a second inverse transition matrix which is the first inverse transition matrix raised to a power J where J is an integer; the logic device being further adapted to determine whether J is equal to N; the logic device being further adapted to multiply, if J is equal to N, in modulo-2 arithmetic the second inverse transition matrix by the current binary vector to produce the binary vector that was contained in the linear feedback shift register N clock pulses prior to the present state; and a loading circuit for loading, if J is equal to N, the binary vector into the linear feedback shift register. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28)
-
Specification