×

Method and apparatus to enable insertion/ejection of a device in a computer system while maintaining operation of the computer system and application software

  • US 6,141,711 A
  • Filed: 12/19/1996
  • Issued: 10/31/2000
  • Est. Priority Date: 12/19/1996
  • Status: Expired due to Term
First Claim
Patent Images

1. A method for allowing insertion and removal of a device into an operational computer system without disrupting processing on the computer system, comprising the steps of:

  • providing a secondary bus for receiving devices to be inserted and ejected from the computer system;

    providing a secondary bus controller coupled to a primary bus in the computer system;

    receiving, in the secondary bus controller, a first signal indicating a device is to be inserted or removed;

    stopping a bus clock on the secondary bus in response to the first signal so as to halt processing on devices coupled to the secondary bus;

    allowing insertion and removal of a device from the secondary bus;

    receiving a second signal indicating that a device has been inserted or removed;

    restarting the bus clock on the secondary bus in response to the second signal;

    reconfiguring the computer system for devices present on the secondary bus;

    determining, in the secondary bus controller, whether a device is to be inserted or removed and setting a bit in the secondary bus controller indicating whether a device is to be inserted or removed; and

    signalling, in response to the first signal, an interrupt routine in the host processor, said interrupt routine comprising the steps of;

    determining, from the first signal and the bit, whether a device is to be removed or inserted;

    determining, if a device is to be inserted, whether the device has been inserted into the secondary peripheral bus in response to the second signal;

    setting, in the secondary peripheral bus controller, a bit indicating the secondary peripheral bus controller clock is to be started for the newly inserted device; and

    setting in the secondary bus controller a bit indicating that the reset signal to the device inserted is to be deasserted.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×