Semiconductor metalization barrier

• US 6,144,099 A
• Filed: 03/30/1999
• Issued: 11/07/2000
• Est. Priority Date: 03/30/1999
• Status: Expired due to Term

• Current Assignee: Advanced Micro Devices, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Pramanick, Shekhar, Brown, Dirk, Lopatin, Sergey D.
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): ANYA, IGWE U
• Application Number:
  US09/282,079
• Time in Patent Office: 588 Days
• Field of Search: 257/758, 257/751, 257/752, 257/759, 257/762, 257/774, 438/619, 438/700, 438/633, 438/623, 438/643, 438/678, 438/685, 438/692, 438/699, 438/558
• US Class Current: 257/758
• CPC Class Codes: H01L 21/288 from a liquid, e.g. electrolytic deposition
• CPC Class Codes: H01L 21/76846 Layer combinations
• CPC Class Codes: H01L 21/76849 the layer being positioned on top of the main fill metal
• CPC Class Codes: H01L 23/485 consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts H01L23/4821, H01L23/4822, H01L23/4824, H01L23/4825 take precedence; materials H01L23/532, bond pads H01L24/02, bump connectors H01L24/10
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor metalization barrier, and manufacturing method therefor, is provided which is a stack of a cobalt layer and cobalt tungsten layer deposited on a copper bonding pad.

Claims

1. A semiconductor device comprising:

a semiconductor substrate;

a first dielectric layer on said semiconductor substrate, said first dielectric layer having an opening provided therein;

a first conductive layer disposed in said opening in said first dielectric layer;

a second dielectric layer disposed on said first dielectric layer and said first conductive layer, said second dielectric layer having a second opening provided therein exposing a portion of said first conductive layer;

a cobalt layer disposed in said second opening; and

a cobalt tungsten layer disposed on said cobalt layer.

2. The semiconductor device as claimed in claim 1 wherein said conductive material is selected from a group consisting of copper, aluminum, gold, silver, an alloy thereof, and a combination thereof.

3. The semiconductor device as claimed in claim 1 includes an exterior electrical connection to said cobalt tungsten layer.

4. The semiconductor device as claimed in claim 3 wherein said external electrical connection uses a material selected from a group consisting of copper, aluminum, gold, silver, an alloy thereof, and a combination thereof.

5. A semiconductor interconnect barrier layer comprising a layer of cobalt on said interconnect, and a layer of cobalt tungsten alloy on said cobalt layer.

6. The barrier as claimed in claim 5 wherein said interconnect is formed of copper.