Programmably interconnected programmable devices

• US 6,144,327 A
• Filed: 08/12/1997
• Issued: 11/07/2000
• Est. Priority Date: 08/15/1996
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intellectual Property Development Associates of Connecticut Incorporated
• Inventors: Distinti, Robert J, Smith, Harry F
• Primary Examiner(s): Jean Pierre, Peguy
• Application Number:
  US08/909,838
• Time in Patent Office: 1,183 Days
• Field of Search: 341/110, 341/88, 341/111, 341/112, 341/144, 341/155, 341/126, 341/137, 326/37, 326/38, 326/39, 326/41, 348/552, 711/1, 711/100, 711/103
• US Class Current: 341/126
• CPC Class Codes: G06F 15/7867 with reconfigurable architecture
• CPC Class Codes: G06J 3/00 Systems for conjoint operation of complete digital and complete analogue computers

Abstract

Disclosed is an integrated circuit comprising a substrate having a plurality of digital signal processors, including at least one analog circuit block, and means on said substrate for programmably interconnecting said processors and said at least one analog circuit block together. Also disclosed is a programming system comprising means for converting a programmable analog array specification into one or more programs executable by one or more digital signal processors so as to perform the identical or substantially identical function or functions as the programmed analog array.

Claims

1. An integrated circuit comprising a substrate on which are fabricated a plurality of digital processors, at least one analog signal processing circuit block, and a plurality of buses coupled to externally programmable interconnect means for interconnecting together said plurality of digital processors and said at least one analog signal processing circuit block in a predetermined configuration, wherein said plurality of buses of said integrated circuit comprise at least one signal bus comprising an optical conductor.

2. An integrated circuit as in claim 1, and further comprising a programming interface having inputs coupled to a programming source and outputs coupled to said plurality of digital processors.

3. An integrated circuit as in claim 1, and further comprising a programming interface having inputs coupled to a programming source and outputs coupled to said externally programmable interconnect means.

4. An integrated circuit as in claim 1, wherein said plurality of buses comprise at least one digital signal bus coupled to said plurality of digital processors and at least one analog signal bus coupled to said at least one analog signal processing circuit block, and wherein said externally programmable interconnect means is coupled to said at least one digital signal bus and to said at least one analog signal bus.

5. An integrated circuit as in claim 4, wherein said at least one analog signal processing circuit block is comprised of an analog to digital converter, and wherein an input of said analog to digital converter is programmably coupled to said at least one analog signal bus, and an output of said analog to digital converter is programmably coupled to said at least one digital signal bus.

6. An integrated circuit as in claim 4, wherein said at least one analog signal processing circuit block is comprised of a digital to analog converter, and wherein an input of said digital to analog converter is programmably coupled to said at least one digital signal bus, and an output of said digital to analog converter is programmably coupled to said at least one analog signal bus.

7. An integrated circuit as in claim 1, wherein at least one of said digital processors is a digital signal processor.

8. An integrated circuit as in claim 1, wherein at least one of said digital processors is a reduced instruction set digital processor.

9. An integrated circuit as in claim 1, and further comprising at least one optical device disposed on said substrate, said optical device having at least one of an input or an output coupled to said optical conductor.

10. An integrated circuit as in claim 1, and further comprising at least one digital signal input or output port that is programmably coupled to at least one of said plurality of digital processors, and at least one analog signal input or output port that is programmably coupled to said at least one analog signal processing circuit block.

11. An integrated circuit as in claim 9, and further comprising at least one optical input or output port that is coupled to said optical device through said optical conductor.

12. An integrated circuit as in claim 1, and further comprising a programming interface having inputs coupled to a source of a television signal and outputs coupled to said externally programmable interconnect means.

13. An integrated circuit as in claim 1, and further comprising a programming interface having inputs coupled to a data communications network and outputs coupled to said externally programmable interconnect means.

14. An integrated circuit as in claim 1, and further comprising a programming interface having inputs coupled to an Internet site and outputs coupled to said externally programmable interconnect means.

15. A programming system comprising means for converting a stored analog array specification into one or more stored programs executable by one or more digital signal processors so as to perform an identical or substantially identical function or functions as an analog array programmed in accordance with said stored analog array specification, wherein said system has an output coupled to an integrated circuit comprising a substrate on which are fabricated at least one digital processor, at least one analog signal processing circuit block, a plurality of buses coupled to externally programmable interconnect means for interconnecting together said at least one digital processor and said at least one analog signal processing circuit block in a predetermined configuration, and a programming interface having inputs coupled to said output of said programming system, and outputs coupled to said at least one digital processor and to said externally programmable interconnect means, wherein said stored programs are expressive of program code for said at least one digital processor and switching instructions for causing said externally programmable interconnect means to assume a predetermined interconnect state, and wherein said integrated circuit is further comprised of at least one optical device disposed on said substrate, said optical device having at least one of an input or an output coupled to an optical conductor formed on or within said substrate, and further comprising at least one optical input or output port that is coupled to said optical device through said optical conductor.

16. A programming system as in claim 15, wherein said plurality of buses comprise at least one digital signal bus coupled to said at least one digital processor and at least one analog signal bus coupled to said at least one analog signal processing circuit block, and wherein said externally programmable interconnect means is coupled to said at least one digital signal bus and to said at least one analog signal bus.

17. A programming system as in claim 16, wherein said at least one analog signal processing circuit block is comprised of an analog to digital converter, and wherein an input of said analog to digital converter is programmably coupled to said analog signal bus, and an output of said analog to digital converter is programmably coupled to said digital signal bus, and wherein said at least one analog signal processing circuit block is further comprised of a digital to analog converter, and wherein an input of said digital to analog converter is programmably coupled to said digital signal bus, and an output of said digital to analog converter is programmably coupled to said analog signal bus.

18. An integrated circuit comprising a substrate on which are fabricated a plurality of digital processors and a plurality of buses coupled through a programming interface to an external program source, said programming interface being responsive to programming information received from said external program source for selectively coupling together said plurality of digital processors in a predetermined configuration, and said integrated circuit further comprising at least one optical device circuit block that is coupled to at least one of said buses and being selectively coupled together with at least one of said plurality of digital processors in the predetermined configuration.

19. An integrated circuit as in claim 18, and further comprising at least one analog signal processing circuit block that is coupled to at least one of said buses and being selectively coupled together with at least one of said plurality of digital processors in the instruction set digital processor.

20. An integrated circuit, comprising a substrate on which are fabricated at least two digital data processors;

a plurality of buses; and

a programming interface for coupling at least one of said plurality of buses to an external program source, said programming interface being responsive to programming information received from said external program source for selectively coupling together said at least two digital data processors in a predetermined configuration;

said integrated circuit further comprising at least one optical device that is selectively coupled to at least one of said plurality of buses in accordance with said programming information.

21. An integrated circuit as in claim 20, wherein said at least one optical device is comprised of at least one of an optical emitter, an optical receiver and an optical conductor.

22. An integrated circuit as in claim 20, wherein said at least one optical device is comprised of at least one of an optical waveguide and an optical wavelength converter.

23. An integrated circuit as in claim 20, and further comprising at least one analog signal processing circuit block that is coupled to at least one of said plurality buses and that is selectively coupled to at least one of said at least two digital data processors in accordance with said programming information.

24. An integrated circuit as in claim 20, and further comprising circuitry for extracting said programming information from an input video signal.

25. An integrated circuit as in claim 20, and further comprising circuitry for extracting said programming information from an input audio signal.

26. An integrated circuit as in claim 20, wherein said external program source comprises a unit that is coupled to said programming interface through the Internet.

27. An integrated circuit as in claim 20, wherein said external program source comprises a unit that is coupled to said programming interface through the World Wide Web.

28. An integrated circuit as in claim 20, and further comprising a memory for storing received programming information, and wherein at least one of said first and second digital data processors has read/write access to said memory for modifying stored programming information.

29. An integrated circuit, comprising a substrate on which are fabricated a plurality of digital logic blocks;

a plurality of buses; and

a programming interface for coupling at least one of said plurality of buses to an external program source, said programming interface being responsive to programming information received from said external program source for selectively coupling together said plurality of digital logic blocks in a predetermined configuration;

said integrated circuit further comprising at least one optical device that is selectively coupled to at least one of said plurality of buses in accordance with said programming information.

30. An integrated circuit as in claim 29, and further comprising at least one analog signal processing circuit block that is coupled to at least one of said plurality buses and that is selectively coupled to at least one of said at plurality of digital logic blocks in accordance with said programming information.

31. An integrated circuit as in claim 29, and further comprising a memory for storing received programming information, wherein at least some of said digital logic blocks are organized into at least one digital data processor, and wherein said at least one digital data processor has read/write access to said memory for modifying stored programming information.

32. An integrated circuit as in claim 29, wherein said programming interface comprises circuitry for extracting said programming information from at least one of an input video signal or an input audio signal.

33. An integrated circuit as in claim 29, wherein said programming interface comprises circuitry for extracting said programming information from a least one of an input television signal or an input radio signal.