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Apparatus for synchronizing master and slave processors

  • US 6,147,562 A
  • Filed: 05/26/1999
  • Issued: 11/14/2000
  • Est. Priority Date: 11/26/1996
  • Status: Expired due to Fees
First Claim
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1. A synchronization apparatus of an assembly that generates a system clock signal which is synchronized to one of a plurality of reference clocks, comprising:

  • a voltage controlled oscillator having a control input and that generates the system clock signal of the assembly dependent on a signal at said control input;

    an arrangement including phase detectors each having two inputs and an output, a respective reference clock signal applied to one of said two inputs of each of said phase detectors and the system clock signal being applied to the other of said two inputs;

    filters having inputs connected to said outputs of said phase detectors and having outputs;

    switches connected at said outputs of said filters to connect signals output from said filters to said control input of said voltage controlled oscillator;

    an operating controller connected to said switches that controls said switches such that respectively one of the output signals of the filters is through-connected to the control input of the VCO, andfurther switches connected to said operating controller which controls said further switches such that, given a case wherein the output signal of a respective one of the filters is not through-connected to the input of the VCO,the output of a respective on of the phase detectors is switched to tri-state;

    the output signal is fed back to a first input of said respective one of said filters;

    and a decoupled signal of the control input of the VCO is applied to a second input of said respective one of said filters.

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