Input sampling structure for delta-sigma modulator
First Claim
1. An input sampling circuit comprising:
- main input sampling structure comprising;
an integrator having a positive input terminal and a negative input terminal;
a first capacitor; and
a first plurality of switches for selectively connecting the first capacitor to a common mode voltage, the negative input terminal, a first input signal line, a first reference line, and a second reference line; and
a first replica input sampling structure coupled to the main input sampling structure, the first replica input sampling structure comprising;
a first buffer connected to the first input signal line, the first buffer reducing the signal dependent current from the first input signal thereby reducing gain error;
a second capacitor; and
a second plurality of switches for selectively connecting the second capacitor to the common mode voltage, the first buffer, and the first and second reference lines such that a signal-dependent current that is drawn from the reference signal lines is cancelled in the main input sampler.
1 Assignment
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Accused Products
Abstract
A signal processing circuit includes a main input sampling structure with an integrator operational amplifier and input lines including a switched capacitor. The input lines have switched connections to input signal lines and reference signal lines. A replica sampling structure is used in combination with the main input sampling structure to eliminate or reduce signal-dependent current that is drawn from the input signal line and the reference signal line. The replica sampler includes buffered input lines and switched capacitor of the input sampling structure but the capacitors have switched connections to the reference signal lines such that the connections have opposite polarity to the connections of the reference signal line to the input sampling structure. The replica sampler eliminates or reduces signal-dependent current from the reference signal lines. Buffering of the input lines in the replica sampler eliminates or reduces the signal-dependent current drawn from the input signal lines. The structure efficiently allows the use of a smaller capacitance for the same performance.
38 Citations
18 Claims
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1. An input sampling circuit comprising:
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main input sampling structure comprising; an integrator having a positive input terminal and a negative input terminal; a first capacitor; and a first plurality of switches for selectively connecting the first capacitor to a common mode voltage, the negative input terminal, a first input signal line, a first reference line, and a second reference line; and a first replica input sampling structure coupled to the main input sampling structure, the first replica input sampling structure comprising; a first buffer connected to the first input signal line, the first buffer reducing the signal dependent current from the first input signal thereby reducing gain error; a second capacitor; and a second plurality of switches for selectively connecting the second capacitor to the common mode voltage, the first buffer, and the first and second reference lines such that a signal-dependent current that is drawn from the reference signal lines is cancelled in the main input sampler. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An analog-to-digital converter (ADC) comprising:
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a digital filter; a delta-sigma modulator coupled to the digital filter, the delta-sigma modulator comprising; a main input sampling structure comprising; an integrator having a positive input terminal and a negative input terminal; a first capacitor; and a first plurality of switches for selectively connecting the first capacitor to a common mode voltage, the negative input terminal, a first input signal line, a first reference line, and a second reference line; and a first replica input sampling structure coupled to the main input sampling structure, the first replica input sampling structure comprising; a first buffer connected to the first input signal line, the first buffer reducing the signal dependent current from the first input signal thereby reducing gain error; a second capacitor; and a second plurality of switches for selectively connecting the second capacitor to the common mode voltage, the first buffer, and the first and second reference lines such that a signal-dependent current that is drawn from the reference signal lines is cancelled in the main input sampler. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A method for reducing distortion and gain errors in an input sampling circuit having a main input sampling structure comprising an integrator having a positive input terminal and a negative input terminal, a first capacitor, and a first plurality of switches for selectively connecting the first capacitor to a common mode voltage, the negative input terminal, a first input signal line, a first reference line, and a second reference line, the method comprising:
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coupling a first replica input sampling structure to the main input sampling structure, the first replica input sampling structure comprising a first buffer, a second capacitor, and a second plurality of switches for selectively connecting the second capacitor to the common mode voltage, the first buffer, and the first and second reference lines; buffering the first input signal line using the first buffer to reduce signal dependent current from the first input signal line; and controlling connections of the first and second reference signal lines to the second capacitor in the first replica input sampling structure such that a signal-dependent current that is drawn from the reference signal lines is cancelled in the main input sampler. - View Dependent Claims (18)
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Specification