×

Asynchronous multiport register file with self resetting write operation

  • US 6,151,266 A
  • Filed: 10/03/1997
  • Issued: 11/21/2000
  • Est. Priority Date: 10/03/1997
  • Status: Expired due to Fees
First Claim
Patent Images

1. A write address macro for a register file, comprising:

  • input isolation circuit means for receiving first and second address signals and a global write enable signal and generating corresponding conditioned output signals of a predetermined duration;

    a first write address buffer for receiving and temporarily storing the first conditioned write address signal from the input isolation circuit;

    a second write address buffer for receiving and temporarily storing the second conditioned write address signal from the input isolation circuit;

    a write decoder and write word line driver circuit coupled to receive the first and second conditioned write address signals from the first and second write address buffers, respectively, including means for generating true and complement word line select signals;

    a write enable signal generator coupled to receive a conditioned write enable signal from the input isolation circuit means, including means for providing one or more write enable signals and a priority signal to the write decoder and write word line driver.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×