Process to improve adhesion of HSQ to underlying materials

• US 6,153,512 A
• Filed: 10/12/1999
• Issued: 11/28/2000
• Est. Priority Date: 10/12/1999
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Jang, Syun-Ming, Chang, Chung-Long
• Primary Examiner(s): Tsai, Jey
• Assistant Examiner(s): GURLEY, LYNNE ANN
• Application Number:
  US09/414,922
• Time in Patent Office: 413 Days
• Field of Search: 438/624, 438/763, 438/780, 438/781, 438/782, 438/788, 438/964
• US Class Current: 438/624
• CPC Class Codes: H01L 21/02131 the material being halogen doped silicon oxides, e.g. FSG
• CPC Class Codes: H01L 21/02134 the material comprising hydrogen silsesquioxane, e.g. HSQ
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/022 the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides adhesion layers or buffer layers H01L21/02304, H01L21/02362
• CPC Class Codes: H01L 21/02271 deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition H01L21/02266 takes precedence
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/02282 liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
• CPC Class Codes: H01L 21/02315 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/31058 of organic layers
• CPC Class Codes: H01L 21/3124 layers comprising hydrogen silsesquioxane
• CPC Class Codes: H01L 21/31629 Deposition of halogen doped silicon oxide, e.g. fluorine doped silicon oxide
• CPC Class Codes: H01L 21/76801 characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
• CPC Class Codes: H01L 21/76826 by contacting the layer with gases, liquids or plasmas
• CPC Class Codes: H01L 21/76834 formation of thin insulating films on the sidewalls or on top of conductors H01L21/76831 takes precedence

Abstract

A process for forming an intermetal dielectric, (IMD), layer, comprised of an overlying silicon oxide layer, and an underlying low k dielectric layer, such as hydrogen silsesquioxane, (HSQ), has been developed. The process features the use of a series of plasma treatments, performed in a nitrogen containing ambient, used to improve the adhesion of the IMD layer, to underlying materials. A first plasma treatment is performed on a thin insulator layer, prior to application of the HSQ layer. The plasma treatment roughens the top surface of the thin insulator layer, resulting in improved adhesion of the HSQ layer to the thin insulator layer. A second plasma treatment is performed to the HSQ layer, prior to deposition of the overlying, thick silicon oxide layer, allowing improve adhesion of the thick silicon oxide layer, to the underlying HSQ layer, to be achieved.

Claims

1. A method of forming an intermetal dielectric, (IMD), layer, on a semiconductor substrate, comprising the steps of:

providing metal interconnect structures, overlying, and contacting, underlying conductive regions;

forming a thin insulator layer on said metal interconnect structures;

performing a first plasma treatment on said thin insulator layer;

applying a low k dielectric layer from the group consisting of one of hydrogen silsesquioxane (HSQ) and fluorinated silicon oxide (FSG) on the top surface of the plasma treated, said thin insulator layer;

performing a second plasma treatment on said low k dielectric layer; and

depositing a thick insulator layer, on the plasma treated, said low k dielectric layer, to form a composite, IMD layer, comprised of underlying, said low k dielectric layer, and overlying, said thick insulator layer.

2. The method of claim 1, wherein said metal interconnect structure is comprised of a metal chosen from a group that contains aluminum, tungsten, or copper.

3. The method of claim 1, wherein said thin insulator layer is a silicon oxide layer, obtained via PECVD procedures, to a thickness between about 450 to 550 Angstroms.

4. The method of claim 1, wherein said thin insulator layer is a silicon oxynitride layer, or a silicon nitride layer, obtained via PECVD or LPCVD procedures, at a thickness between about 450 to 550 Angstroms.

5. The method of claim 1, wherein said first plasma treatment is performed in a nitrogen, or a N₂ O ambient, at a temperature between about 340 to 410°

C., at a pressure between about 3 to 20 torr, at an R.F. power between about 100 to 250 watts, at an R.F. frequency between about 350 KHz to 13.56 MHz, and using a flow rate of nitrogen or N₂ O, between about 1000 to 2000 SLM.

6. The method of claim 1, wherein said low k dielectric layer, is a hydrogen silsesquioxane, (HSQ), layer, applied via spin on procedures, to a thickness between about 3000 to 5000 Angstroms, with a dielectric constant between about 2.8 to 3.0.

7. The method of claim 1, wherein said low k dielectric layer is a fluorinated silicon oxide layer, (FSG), obtained via CVD procedures to a thickness between about 4000 to 17000 Angstroms.

8. The method of claim 1, wherein said second plasma treatment is performed in a nitrogen or N₂ O ambient, at a temperature between about 340 to 410°

C., at a pressure between about 3 to 20 torr, at a R.F. power between about 100 to 250 watts, at a R.F. frequency between about 350 KHz to 13.56 MHz., and using a nitrogen or N₂ O flow rate between about 1000 to 2000 SLM.

9. The method of claim 1, wherein said thick insulator layer is a silicon oxide layer, obtained via PECVD procedures, to a thickness between about 12000 to 19000 Angstroms, using tetraethylorthosilicate, (TEOS), as a source.

10. A method of forming an IMD layer, on a semiconductor substrate, using a series of plasma treatments, in a nitrogen containing ambient, to improve the adhesion of said IMD layer, to said semiconductor substrate, comprising the steps of:

providing metal interconnect structures, overlying, and contacting, underlying conductive regions;

depositing a thin silicon oxide layer, completely contouring said metal interconnect structures;

performing a first plasma treatment, in a nitrogen containing ambient, resulting in a roughened top surface for said thin silicon oxide layer;

applying a hydrogen silsesquioxane, (HSQ), layer, on the roughened top surface of said thin silicon oxide layer;

performing a second plasma treatment, in a nitrogen containing ambient, creating a roughened top surface of said HSQ layer; and

depositing a thick silicon oxide layer, on the roughened top surface of said HSQ layer, resulting in said IMD layer, comprised of said thick silicon oxide layer, and said HSQ layer, overlying the roughened top surface of said thin silicon oxide layer.

11. The method of claim 10, wherein said conductive regions are either lower level, metal interconnect structures, or active device regions, in said semiconductor substrate.

12. The method of claim 10, wherein said metal interconnect structures are comprised of a metal chosen from a group that includes aluminum, tungsten, or copper.

13. The method of claim 10, wherein said thin silicon oxide layer is obtained via PECVD procedures, at a thickness between about 450 to 550 Angstroms.

14. The method of claim 10, wherein said first plasma treatment is performed in a nitrogen or N₂ O ambient, at a temperature between about 340 to 410°

C., at a pressure between about 3 to 20 torr, at an R.F. power between about 100 to 250 watts, at an R.F. frequency between about 350 KHz to 13.56 MHz, and at a nitrogen or N₂ O flow of between about 1000 to 2000 SLM.

15. The method of claim 10, wherein said HSQ layer is applied via a spin on procedure, to a thickness between about 3000 to 5000 Angstroms, featuring a dielectric constant between about 2.8 to 3.0.

16. The method of claim 10, wherein said second plasma treatment is performed in a nitrogen or N₂ O ambient, at a temperature between about 340 to 410°

C., at a pressure between about 3 to 20 torr, at an R.F. power between about 100 to 250 watts, at an R.F. frequency between about 350 KHz to 13.56 MHz, and using a flow of nitrogen, or N₂ O, between about 1000 to 2000 SLM.

17. The method of claim 10, wherein said thick silicon oxide layer is obtained via PECVD procedures, to a thickness between about 12000 to 19000 Angstroms, using TEOS as a source.