Computer system implementing hot docking and undocking capabilities by employing a local bus arbiter idle stats in which the arbiter is parked on a first input/output bus portion

• US 6,154,798 A
• Filed: 02/16/1999
• Issued: 11/28/2000
• Est. Priority Date: 07/19/1996
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Compaq Computer Corporation (HP Inc.)
• Inventors: Delisle, David J., Maguire, David J., Edwards, James R., Lin, Richard S.
• Primary Examiner(s): Lee, Thomas C.
• Assistant Examiner(s): WANG, ALBERT C
• Application Number:
  US09/250,596
• Time in Patent Office: 651 Days
• Field of Search: 710/103, 710/119, 710/131, 710/72, 710/62
• US Class Current: 710/72
• CPC Class Codes: G06F 13/36 for access to common bus or bus system
• CPC Class Codes: G06F 13/4081 Live connection to bus, e.g. hot-plugging current or voltage limitation during live insertion H02H9/004

Abstract

A method for hot docking and hot undocking a portable computer and a docking station. The portable computer and docking station are physically coupled via a shared PCI bus and an expansion connector. Varying length pins in the expansion connector generate docking and undocking handshaking signals used by microcontrollers in the portable computer and docking station. The portable computer and docking station are functionally connected via low onresistance switches located in the portable computer. Following a docking event, closure of the switches connects the portion of the shared PCI bus in the docking station with the PCI bus in the portable computer. When the switches are open, the PCI busses are functionally isolated. Both the portable computer and the docking station also include a local arbiter for arbitrating and granting bus control requests from devices coupled to the shared PCI bus. These local arbiters may be placed into an idled state by either the operating system (through system BIOS) or by the microcontrollers. The arbiters are idled during docking and undocking events in order to inhibit bus cycles on the PCI bus, thereby preventing cycles from being lost. Following completion of a hot docking or undocking event, Plug-and-Play system reconfiguration is carried out so that all system resources may be recognized and properly utilized by the operating system.

Claims

1. A computer system incorporating hot docking and undocking capabilities, the computer system comprising:

a first input/output bus portion;

an expansion connector to physically couple the first input/output bus portion to a second input/output portion in an expansion base; and

a local arbiter coupled to the first input/output bus portion to issue bus requests from devices coupled to the first input/output bus portion,

wherein said local arbiter is capable of being placed in an idle state in which said local arbiter is parked on said first input/output bus portion prior to docking and undocking events.

2. The computer system of claim 1, further comprising:

circuitry configured to place said local arbiter in the idle state prior to docking and undocking events.

3. The computer system of claim 1, further comprising:

circuitry coupled to said local arbiter and configured to control a clock associated with said first input/output bus portion.

4. The computer system of claim 1, further comprising:

system basic input/output services (BIOS) code in a memory coupled to said first input/output bus portion to place said local arbiter in the idle state prior to docking and undocking events.

5. The computer system of claim 1, further comprising:

a plurality of bus switches coupled to said expansion connector and to said first input/output portion to couple said first input/output bus portion to the second input/output bus portion.

6. An expansion base incorporating hot docking and undocking capabilities, the expansion base comprising:

a first input/output bus portion;

an expansion connector to physically couple the first input/output bus portion to a second input/output portion in an expansion base; and

a local arbiter coupled to the first input/output bus portion to issue bus requests from devices coupled to the first input/output bus portion,

wherein said local arbiter is capable of being placed in an idle state in which said local arbiter is parked on said first input/output bus portion prior to docking and undocking events.

7. The expansion base of claim 6, further comprising:

circuitry configured to place said local arbiter in the idle state prior to docking and undocking events.

8. The expansion base of claim 6, further comprising:

circuitry coupled to said local arbiter and configured to control a clock associated with said first input/output bus portion.

9. The expansion base of claim 6, further comprising:

system basic input/output services (BIOS) code in a memory coupled to said first input/output bus portion to place said local arbiter in the idle state prior to docking and undocking events.

10. The expansion base of claim 6, further comprising:

a plurality of bus switches coupled to said expansion connector and to said first input/output portion to couple said first input/output bus portion to the second input/output bus portion.