Apparatus and method for digitally monitoring a duty cycle of a pulse width modulated signal
First Claim
1. A circuit for digitally monitoring a duty cycle of a pulse width modulated signal, the circuit comprising:
- a counter portion, a digital filter, and a storage device;
the counter portion connectable to receive the pulse width modulated signal and operable to monitor the received pulse width modulated signal for a predetermined time period during which a count value is established, the established count value corresponding to the portion of the predetermined time period during which the pwm signal is in a predetermined state;
the digital filter connected to receive the count value established by the counter portion and connected to receive a stored count value from the storage device, the digital filter operable to establish a filtered count value based upon the count value and the stored count value input thereto;
the storage device connected to receive the filtered count value established by the digital filter;
wherein the counter portion includes a first counter connected to receive the pulse width modulated signal and operable to count only when the pulse width modulated signal is in the predetermined state, andwherein the counter portion further includes a sampling counter having an output connected to a reset input of the first counter, a predetermined output of the sampling counter effective to reset the first counter, the sampling counter operable to provide the predetermined output to the first counter on a periodic basis.
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Accused Products
Abstract
A circuit for digitally monitoring a duty cycle of a pulse width modulated signal is provided. The circuit includes a counter portion, a digital filter, and a data storage device. The counter portion is connectable to receive the pulse width modulated signal and is operable to monitor the pulse width modulated signal for a predetermined time period during which a count value is established. The digital filter is connected to receive the count value established by the counter portion and is also connected to receive a stored count value from the storage device, the digital filter being operable to establish a filtered count value based upon the count value and the stored count value input thereto. The storage device is connected to receive the filtered count value established by the digital filter. Multiple pwm signals may be also be monitored by including multiple counters, multiple storage devices, and one or more multiplexers.
29 Citations
19 Claims
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1. A circuit for digitally monitoring a duty cycle of a pulse width modulated signal, the circuit comprising:
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a counter portion, a digital filter, and a storage device; the counter portion connectable to receive the pulse width modulated signal and operable to monitor the received pulse width modulated signal for a predetermined time period during which a count value is established, the established count value corresponding to the portion of the predetermined time period during which the pwm signal is in a predetermined state; the digital filter connected to receive the count value established by the counter portion and connected to receive a stored count value from the storage device, the digital filter operable to establish a filtered count value based upon the count value and the stored count value input thereto; the storage device connected to receive the filtered count value established by the digital filter; wherein the counter portion includes a first counter connected to receive the pulse width modulated signal and operable to count only when the pulse width modulated signal is in the predetermined state, and wherein the counter portion further includes a sampling counter having an output connected to a reset input of the first counter, a predetermined output of the sampling counter effective to reset the first counter, the sampling counter operable to provide the predetermined output to the first counter on a periodic basis. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A circuit for digitally monitoring a duty cycle of a plurality of pulse width modulated signals, comprising:
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a plurality of counters, a first multiplexer, a second multiplexer, a digital filter, and a plurality of latches; wherein each counter is connectable to receive a respective pulse width modulated signal and is operable to count only when the respective pulse width modulated signal is in a predetermined state; the first multiplexer connected to receive the count values established by the counters; the second multiplexer connected to receive stored count values from the latches; the digital filter including an input connected to an output of the first multiplexer, and an input connected to an output of the second multiplexer; and the latches connected to an output of the digital filter. - View Dependent Claims (9, 10, 11)
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12. A method of monitoring a duty cycle of a pulse width modulated signal, comprising the steps of:
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performing a first counting operation during a predetermined state of the pulse width modulated signal to establish a count value; filtering the count value established in the counting operation and a previously stored filtered count value so as to establish a filtered count value; storing the filtered count value; performing a second counting operation; and
setting the count value to a perdetermined value when the second counting operation reaches a predetermined value. - View Dependent Claims (13, 14, 15, 16)
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17. A method for monitoring a first signal having a first state and a second state, comprising:
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receiving the first signal; counting in a first predetermined manner when the first signal has one of the first and second states; determining a current count value as a function of the counting in the first predetermined manner; receiving a stored count value; determining a filtered count value as a function of the current count value and the stored count value; storing the filtered count value; counting in a second predetermined manner; and setting the current count value to a predetermined value as a function of the counting in a second predetermined manner. - View Dependent Claims (18, 19)
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Specification