Compression/decompression engine for enhanced memory storage in MPEG decoder

• US 6,157,740 A
• Filed: 11/17/1997
• Issued: 12/05/2000
• Est. Priority Date: 11/17/1997
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Ngai, Chuck H., Buerkle, Daniel J.
• Primary Examiner(s): Boudreau, Leo H.
• Assistant Examiner(s): SHERALI, ISHRAT I
• Application Number:
  US08/971,438
• Time in Patent Office: 1,114 Days
• Field of Search: 382/248, 382/281, 382/166, 382/232-235, 382/239, 382/250, 382/162, 708/400-405, 708/410, 708/203, 348/403-408, 348/395-398, 348/420, 709/247, 386/109, 386/112, 358/262.1, 345/439
• US Class Current: 382/233
• CPC Class Codes: H04N 11/044 involving transform coding
• CPC Class Codes: H04N 19/423 characterised by memory arrangements H04N19/433 takes precedence
• CPC Class Codes: H04N 19/428 Recompression, e.g. by spatial or temporal decimation
• CPC Class Codes: H04N 19/61 in combination with predictive coding

Abstract

A compression/decompression engine is disclosed for reducing memory requirements of a decode system by storing decoded video data in compressed form. The compression engine comprises parsing chrominance UV data into separate chrominance U data and chrominance V data, and transform logic implementing a Hadamard transformation of multiple bytes of decoded video data in parallel into frequency domain signals. Compression logic is coupled to the transform logic and performs, preferably, a 2:1 transformation of the frequency domain signals to produce compressed video signals for storage in memory. The transform logic and compression logic transform and compress multiple bytes of decoded video data in parallel within a single clock cycle of the decode system. Upon retrieval from memory, the compressed data is returned to original format by the decompression engine, which employs the same transform logic as used by the compression engine. Reassembly logic then returns the separate chrominance U data and chrominance V data to chrominance UV data for use by the associated motion compensation unit or for display.

Claims

1. A compression unit for a system for decoding a digital video sequence, said system having a video decoder, memory and a memory controller, said compression unit to be coupled between said video decoder and said memory controller for compressing decoded video data output from the video decoder for storage in said memory by the memory controller, said compression unit comprising:

Hadamard transform logic for transforming the decoded video data output from the video decoder to a frequency domain signal using a Hadamard transformation;

compression logic coupled to the transform logic for compressing the frequency domain signal to produce a compressed video signal; and

wherein said Hadamard transform logic and said compression logic transform and compress multiple bytes of decoded video data in a single stage executed in a single clock cycle of said system to produce said compressed video signal.

2. The compression unit of claim 1, wherein said Hadamard transform logic implements a 4-point Hadamard transform and comprises multiple adders coupled in parallel such that four bytes of decoded video data are transformed by said transform logic in a single stage executed in a single clock cycle of said system.

3. The compression unit of claim 2, wherein an output vector y (y₁,y₂,y₃,y₄) of the 4-point Hadamard transform implemented by the transform logic is defined as:

space="preserve" listing-type="equation">y.sub.0 =1/4·

(x0+x1+x2+x3)

space="preserve" listing-type="equation">y.sub.1 =1/4·

(x0+x1-x2-x3)

space="preserve" listing-type="equation">y.sub.2 =1/4·

(x0-x1-x2+x3)

space="preserve" listing-type="equation">y.sub.3 =1/4·

(x0-x1+x2-x3)

and wherein the 1/4 term of each of said y₀, y₁, y₂ &

y₃ equations is implemented within said compression logic.

4. The compression unit of claim 3, wherein said compression logic comprises means for dividing, means for rounding and means for truncating said frequency domain signal to produce said compressed video signal.

5. The compression unit of claim 4, wherein said means for dividing, means for rounding and means for truncating comprise means for performing 2:

1 compression on said frequency domain signal.

6. The compression unit of claim 1, wherein said digital video sequence includes luminance data and chrominance UV data, said chrominance UV data comprising an alternating UV sample format when output from said video decoder, and wherein said compression unit comprises means for parsing said alternating UV sample format of said chrominance U data and chrominance V data into separate data strings for handling by said transform logic and said compression logic, said Hadamard transform logic transforming the separate data strings of said chrominance U data and said chrominance V data into frequency domain signals and said compression logic producing compressed video signals from said frequency domain signals.

7. The compression unit of claim 6, wherein said Hadamard transform logic comprises a multi-point Hadamard transform and said means for parsing said chrominance U data and said chrominance V data comprises means for forming multi-byte chrominance U data strings and multi-byte chrominance V data strings.

8. The compression unit of claim 1, wherein said compression unit further comprises a decompression unit for decompressing said compressed video signal, said decompression unit comprising:

unpack and multiply logic for expanding said compressed video signal;

said Hadamard transform logic further comprising means for inverse transforming said expanded compressed video signal from frequency domain to spatial domain; and

truncate means for decompressing the spatial domain output of said Hadamard transform logic to reconstruct said decoded video data in original format.

9. A compression unit for a system for decoding a digital video sequence, said system having a video decoder, memory and a memory controller, said compression unit to be coupled between said video decoder and said memory controller for compressing decoded video data output from the video decoder for storage in said memory by the memory controller, said digital video sequence comprising chrominance UV data and luminance data, said chrominance UV data comprising an alternating UV sample format when output from said video decoder, said compression unit comprising:

means for parsing said alternating UV sample format of said chrominance UV data to separate said chrominance UV data into chrominance U data and chrominance V data strings;

Hadamard transform logic for transforming the separate chrominance U data and chrominance V data strings into frequency domain signals using a Hadamard transformation; and

compression logic coupled to the Hadamard transform logic for compressing the frequency domain signals to produce compressed video signals representative of said separate chrominance U data and chrominance V data strings.

10. The compression unit of claim 9, further comprising address and length translation means for tracking said compressed video signals representative of chrominance U data and chrominance V data when stored to memory.

11. The compression unit of claim 9, wherein said compressed video signals produced by said Hadamard transform logic and said compression logic are each formed from multiple bytes of chrominance U data, chrominance V data, or luminance data comprising decoded video data from the video decoder.

12. The compression unit of claim 9, wherein said Hadamard transform logic comprises a Hadamard transformation of multiple data bytes in parallel in a single stage executed in a single clock cycle, said data bytes comprising bytes of luminance data, or chrominance U data or chrominance V data.

13. The compression unit of claim 12, wherein said Hadamard transform logic implements a 4-point Hadamard transform and comprises multiple adders coupled in parallel so that four bytes of luminance data, chrominance U data or chrominance V data of said decoded video data are transformed in parallel within a single clock cycle of said system.

14. The compression unit of claim 13, wherein said compression logic comprises means for dividing, means for rounding and means for truncating said frequency domain signals to produce said compressed video signals.

15. The compression unit of claim 14, wherein said means for dividing, means for rounding and means for truncating comprise means for performing 2:

1 compression of said frequency domain signals to produce said compressed video signals.

16. The compression unit of claim 9, wherein said compression unit further comprises a decompression unit for decompressing said compressed video signals stored in said memory, said decompression unit comprising:

unpack and multiply logic for expanding said compressed video signals;

said Hadamard transform logic further comprising means for inverse transforming the expanded compressed video signals from frequency domain to spatial domain; and

truncate means for decompressing the spatial domain output of said Hadamard transform logic to reconstruct said chrominance U data and chrominance V data.

17. The compression unit of claim 16, further comprising reassembly logic for reassembling said chrominance UV data from said reconstructed chrominance U data and chrominance V data.

18. A system for decoding a digital video sequence, said system comprising:

a video decoder for decoding the digital video sequence to produce decoded video data;

memory and a memory controller coupled to the video decoder;

a compression engine coupled between the video decoder and the memory controller for compressing decoded video data output from the video decoder for storage in said memory by said memory controller, said compression engine comprising;

Hadamard transform logic for transforming the decoded video data output from the video decoder to a frequency domain signal using a Hadamard transformation;

compression logic coupled to the Hadamard transform logic for compressing the frequency domain signal to produce a compressed video signal; and

wherein said Hadamard transform logic and said compression logic transform and compress multiple bytes of decoded video data in parallel in a single stage executed in a single clock cycle of said system to produce the compressed video signal for storage in said memory by said memory controller.

19. The system of claim 18, wherein said compression logic comprises means for dividing, means for rounding and means for truncating said frequency domain signal to produce said compressed video signal.

20. The system of claim 19, wherein said compression logic comprises logic for performing 2:

1 lossy compression on said frequency domain signal.

21. The system of claim 18, wherein said compression engine further comprises a decompression engine for decompressing said compressed video signal, said decompression engine comprising:

unpack and multiply logic for expanding said compressed video signal;

said Hadamard transform logic further comprising means for inverse transforming said expanded compressed video signal from frequency domain to spatial domain; and

truncate means for decompressing the spatial domain output of said transform logic to reconstruct said decoded video data in original format.

22. A system for decoding a digital video sequence, said digital video sequence comprising chrominance UV data and luminance data, said chrominance UV data comprising an alternating UV sample format, said system comprising:

a video decoder for decoding the digital video sequence and producing decoded video data;

memory and a memory controller coupled to the video decoder;

a compression engine coupled between the video decoder and the memory controller for compressing decoded video data output from the video decoder for storage in said memory by said memory controller, said compression engine comprising;

means for parsing said alternating UV sample format of said chrominance UV data to separate said chrominance UV data into chrominance U data and chrominance V data;

Hadamard transform logic for transforming the separate chrominance U data and chrominance V data into frequency domain signals using a Hadamard transformation; and

compression logic coupled to the Hadamard transform logic for compressing the frequency domain signals to produce compressed video signals representative of said separate chrominance U data and chrominance V data.

23. The system of claim 22, wherein said compression engine further comprises address and length translation means for tracking said compressed video signals representative of chrominance U data and chrominance V data when stored to memory.

24. The system of claim 22, wherein said Hadamard transform logic comprises a Hadamard transformation of multiple data bytes in parallel in a single stage executed in a single clock cycle, said data bytes comprising bytes of luminance data, or chrominance U data or chrominance V data.

25. The system of claim 24, further comprising a decompression engine for decompressing said compressed video signals, said decompression engine comprising:

unpack and multiply logic for expanding said compressed video signals;

said Hadamard transform logic further comprising means for inverse transforming the expanded compressed video signals from frequency domain to spatial domain; and

truncate means for decompressing the spatial domain output of said Hadamard transform logic to reconstruct chrominance U data and chrominance V data.

26. The system of claim 25, further comprising reassembly logic for reassembling said chrominance UV data from said reconstructed chrominance U data and chrominance V data.