Base station system including parallel interference cancellation processor

• US 6,157,847 A
• Filed: 06/29/1999
• Issued: 12/05/2000
• Est. Priority Date: 06/29/1999
• Status: Expired due to Term

• Current Assignee: WSOU Investments, LLC (WSOU Holdings, LLC)
• Original Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Inventors: Nicoloso, Steven P., Liu, Shang-Chieh, Hahm, Mark D., Buehrer, R. Michael
• Primary Examiner(s): VO, NGUYEN THANH
• Application Number:
  US09/342,145
• Time in Patent Office: 525 Days
• Field of Search: 455/561, 455/103, 455/63, 455/296, 455/303, 455/272, 455/273, 455/278.1, 455/307, 375/346, 375/349
• US Class Current: 455/561
• CPC Class Codes: H04B 1/126 having multiple inputs, e.g. auxiliary antenna for receiving interfering signal aerials in general H01Q

Abstract

The base station system includes a cancellation processor connected to a plurality of conventional signal processors. Under the control of a controller, the signal processors acquire user signals in signals received by the base station antennas. The controller controls the cancellation processor to perform cancellation operations with respect to the acquired user signals. The cancellation processor includes first-nth filter stages. Each filter stage operates in the same manner. A filter stage obtains, in parallel, the acquired user signals from signals supplied thereto by estimating symbols in the acquired user signals under the control of the controller. The cancellation processor also includes a cancellation stage associated with each filter stage. Each cancellation stage cancels, in parallel, the obtained user signals output from the associated filter stage from the signals received by the base station antennas. The resulting residual signals output from a cancellation stage are supplied to the next filter stage, and the signals supplied to the first filter stage are the signals received by the base station antennas. A cancellation stage cancels the obtained user signals received thereby from the received signals at a substantially same time with respect to the received signals.

Claims

1. A base station system, comprising:

a controller generating acquisition data for each user signal to be processed, and generating control information for said user signals to be processed, said acquisition data including identity information identifying a user signal to be processed and timing information for said user signal to be processed, said control information including said acquisition data for at least one of said user signals to be processed; and

a plurality of signal processors, each signal processor acquiring a user signal from input signals based on said acquisition data received thereby, and estimating symbols in said acquired user signal; and

a cancellation processor receiving a plurality of received signals and performing a cancellation operation on selected received signals based on said control information to generate said input signals.

2. The system of claim 1, wherein

said controller, for a user signal to be processed, supplies initial information on said user signal to be processed to a selected one of said signal processors, said initial information including said identity information, a search window and timing of said search window for said user signal to be processed, receives search results from said selected signal processor, determines whether said selected signal processor has located said user signal to be processed, and generates said acquisition data for said selected signal processor if said user signal to be processed has been located;

and

said selected signal processor searches for said user signal to be processed based on said initial information, and sends said search results to said controller.

3. The system of claim 1, wherein

said cancellation processor filters said received signals to obtain, in parallel, user signals identified in said control information, and uses said obtained users signals to perform said cancellation operation.

4. The system of claim 3, wherein said cancellation processor cancels, in parallel, each of said obtained user signals from said received signals to generate residual signals.

5. The system of claim 4, wherein said cancellation processor includes delays and performs said filtering such that said obtained user signals are canceled from said received signal at a substantially same time with respect to the received signals.

6. The system of claim 4, wherein said residual signals are added to ones of said obtained signals to generate said input signals.

7. The system of claim 1, wherein said cancellation processor comprises:

N filter stages, where N is an integer greater than 1, filtering signals supplied thereto to obtain, in parallel, user signals identified in said control information,

a cancellation stage associated with each one of said N filter stages, for canceling said obtained user signals from said received signals to generate residual signals, and wherein

a first filter stage of said N filter stages is supplied said received signals, and successive filter stages of said N filter stages receive said residual signal output from said cancellation stage associated with a previous filter stage of said N filter stages.

8. The system of claim 7, wherein said cancellation processor further comprises:

an adder stage for adding said residual signals output from said cancellation stage associated with an Nth filter stage of said N filter stages to said obtained user signals output from said Nth filter stage.

9. The system of claim 8, wherein output from said adder stage serves as said input signals.

10. The system of claim 7, wherein each of said N filter stages estimates symbols in each of said obtained user signals from said supplied signals, and generates each of said obtained user signals from said estimated symbols.

11. The system of claim 10, wherein each successive filter stage of said N filter stages receives said estimated symbols from said previous filter stage, and each successive filter stage estimates symbols in said obtained user signals from said supplied signals based in part on said estimated symbols from said previous filter stage.

12. The system of claim 10, wherein each of said N filter stages generates a channel estimate associated with each of said obtained signals, and estimates symbols in each of said obtained user signals from said supplied signals using said channel estimates.

13. The system of claim 12, wherein each successive filter stage of said N filter stages receives said channel estimates and said estimated symbols from said previous filter stage, and each successive filter stage estimates symbols in said obtained user signals from said supplied signals based in part on said channel estimates and said estimated symbols from said previous filter stage.

14. The system of claim 7, wherein

each of said N filter stages includes first-kth filter blocks, each said acquisition data in said control information being received by one of said first-kth filter blocks, and each of said first-kth filter blocks filtering said supplied signals to generate, as said obtained user signal, a user signal identified by said acquisition data received thereby;

and

each cancellation stage including first-kth delay blocks and first-kth cancellers, said first delay block delaying said received signals by a first predetermined time, said second-kth delay blocks delaying output of said first-(k-1)th cancellers by said first predetermined time, said first-kth cancellers canceling said obtained signals output by said first-kth filter blocks from output of said first-kth delay blocks, respectively.

15. The system of claim 14, wherein said first predetermined period of time is set such that said first-kth cancellers cancel said obtained user signals at a substantially same time with respect to said received signals.

16. The system of claim 14, wherein

said first-kth filter blocks in at least one of said N filter stages performs said filtering in parallel;

and

said first-kth cancellation blocks in at least one of said N cancellation stages cancels said obtained user signals received thereby from said received signals in parallel.

17. The system of claim 16, wherein each of said first-kth cancellation blocks performing said canceling in parallel cancels said obtained user signals received thereby from said received signals at a substantially same time with respect to said received signals.

18. The system of claim 7, wherein each of said cancellation stages cancels said obtained user signals received thereby from said received signals at a substantially same time with respect to said received signals.

19. The system of claim 18, wherein each of said cancellation stages cancels said obtained user signals received thereby from said received signals in parallel.

20. The system of claim 7, further comprising:

N memories connected in series, each of said N memories storing data for a first predetermined of time, a first of said N memories receiving said received signals;

each of said cancellation stages receiving output from a respective one of said N memories.

21. The system of claim 20, wherein said first predetermined period is set, and said cancellation stages include delays, such that each of said cancellation stages cancels said obtained user signals received thereby from said received signals at a substantially same time with respect to said received signals.

22. The system of claim 21, wherein each of said cancellation stages cancels said obtained user signals received thereby from said received signals in parallel.

23. The system of claim 7, wherein each of said cancellation stages cancels said obtain user signals received thereby from said received signals in parallel.

24. A cancellation processor, comprising:

N filter stages, where N is an integer greater than 1, filtering signals supplied thereto to obtain, in parallel, user signals identified in control information received thereby, said control information including acquisition data for at least one user signal, each said acquisition data including identity information identifying a user signal to be processed and timing information for said user signal to be processed;

a cancellation stage associated with each one of said N filter stages, for canceling said obtained user signals from said received signals to generate residual signals;

a first filter stage of said N filter stages being supplied said received signals, and successive filter stages of said N filter stages receiving said residual signal output from said cancellation stage associated with a previous filter stage of said N filter stages;

each of said N filter stages including first-kth filter blocks, each said acquisition data in said control information being received by one of said first-kth filter blocks, and each of said first-kth filter blocks filtering said supplied signals to generate, as said obtained user signal, a user signal identified by said acquisition data received thereby; and

each cancellation stage including first-kth delay blocks and first-kth cancellers, said first delay block delaying said received signals by a first predetermined time, said second-kth delay blocks delaying output of said first-(k-1)th cancellers by said first predetermined time, said first-kth cancellers canceling said obtained signals output by said first-kth filter blocks from output of said first-kth delay blocks, respectively.

25. The system of claim 24, wherein said first predetermined period of time is set such that said first-kth cancellers cancel said obtained user signals at a substantially same time with respect to said received signals.

26. The system of claim 24, wherein each of said cancellation stages cancels said obtained user signals received thereby from said received signals at a substantially same time with respect to said received signals.

27. The system of claim 26, wherein each of said cancellation stages cancels said obtained user signals received thereby from said received signals in parallel.

28. The system of claim 24, further comprising:

N memories connected in series, each of said N memories storing data for a second redetermined of time, a first of said N memories receiving said received signals;

each of said cancellation stages receiving output from a respective one of said N memories.

29. The system of claim 28, wherein said first and second predetermined periods of time are set such that each of said cancellation stages cancels said obtained user signals received thereby from said received signals at a substantially same time with respect to said received signals.

30. The system of claim 29, wherein each of said cancellation stages cancels said obtained user signals received thereby from said received signals in parallel.

31. The system of claim 24, wherein each of said cancellation stages cancels said obtain user signals received thereby from said received signals in parallel.

32. The system of claim 24, wherein

said first-kth filter blocks in at least one of said N filter stages performs said filtering in parallel;

and

said first-kth cancellation blocks in at least one of said N cancellation stages cancels said obtained user signals received thereby from said received signals in parallel.

33. The system of claim 32, wherein each of said first-kth cancellation blocks performing said canceling in parallel cancels said obtained user signals received thereby from said received signals at a substantially same time with respect to said received signals.