Method and device for analogue to digital conversion
First Claim
1. A parallel analog-to-digital converter having a number of parallel channels between an input terminal and a multiplexer, each channel having sampling means controlled by a channel clock phase to in turn sample a signal on the input terminal, and converter means connected between the sampling means and the multiplexer to convert samples from the sampling means, wherein a switch, common to all channels, is connected in series with the respective sampling means to ground, the switch being controlled by a global clock phase adapted to change its state slightly before the respective channel clock phase changes its state to provide samples to the converter means.
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Abstract
A parallel SC ADC (switched capacitor analog-to-digital converter) includes a passive sampling technique controlled by a global clock phase to reduce the influence of the sampling phase skew. Since it does not require operational amplifiers for sampling, it is very suitable for high speed applications, and yet it can reduce the sampling-phase-skew-related distortion by 20-40 dB in a high speed, parallel SC ADC.
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Citations
13 Claims
- 1. A parallel analog-to-digital converter having a number of parallel channels between an input terminal and a multiplexer, each channel having sampling means controlled by a channel clock phase to in turn sample a signal on the input terminal, and converter means connected between the sampling means and the multiplexer to convert samples from the sampling means, wherein a switch, common to all channels, is connected in series with the respective sampling means to ground, the switch being controlled by a global clock phase adapted to change its state slightly before the respective channel clock phase changes its state to provide samples to the converter means.
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7. A method for parallel analog-to-digital conversion using a number of parallel channels between an input terminal and a multiplexer, comprising the steps of:
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sampling, in each channel, of a signal on the input terminal, under the control of a channel clock phase; and converting the samples before they are input to the multiplexer, wherein said sampling in each channel is controlled by, in addition to the channel clock phase a switch common to all channels, the switch being controlled by a global clock phase adapted to change its state slightly before the respective channel clock phase changes its state to provide samples for the conversion. - View Dependent Claims (8, 9, 10)
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- 11. A method for sampling an analog signal in parallel using a number of parallel channels between an input terminal and a multiplexer, comprising switching capacitors in each channel controlled by a channel clock phase to in turn sample a signal on the input terminal, wherein said switching is executed depending on a global clock phase adapted to change its state slightly before the respective channel clock phase changes its state to provide samples for conversion.
Specification