Apparatus and method of providing switching frequency synchronization

• US 6,160,591 A
• Filed: 09/19/1997
• Issued: 12/12/2000
• Est. Priority Date: 09/19/1997
• Status: Expired due to Term

• Current Assignee: Rockwell Collins, Inc. (Rtx Corporation)
• Original Assignee: Sony Transcom Incorporated (Rockwell International Corporation), Sony Corporation (Sony Group Corp.)
• Inventors: Sekine, Kazutoyo, Stumfall, David M.
• Primary Examiner(s): HSIA, SHERRIE Y
• Application Number:
  US08/934,316
• Time in Patent Office: 1,180 Days
• Field of Search: 348/607, 348/522, 348/524, 348/730, 348/6, 348/8
• US Class Current: 348/607
• CPC Class Codes: H04N 5/21 Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
• CPC Class Codes: H04N 5/63 Generation or supply of power specially adapted for television receivers

Abstract

An apparatus and method for reducing interference on a display screen in an in-flight entertainment system, where the interference results from power conversion by a power regulator that supplies voltage to the display screen, is disclosed. The apparatus comprises a clock generator that provides a video clock signal and a regulator clock signal having a frequency that is a multiple of a frequency of the video clock signal. The apparatus also comprises a video processing circuit coupled to the clock generator that provides video data to the display screen at a rate derived from the video clock signal. A regulator circuit that is coupled to the video processing circuit and to the clock generator, supplies voltage to the video processing circuit at a rate based on the regulator clock signal.

Claims

1. An apparatus for reducing interference on a display screen in an in-flight entertainment system, the interference resulting from power conversion by a power regulator that supplies voltage to the display screen, comprising:

a clock generator that provides a video clock signal and a regulator clock signal having a frequency that is a multiple of a frequency of the video clock signal;

a video processing circuit coupled to the clock generator that provides video data to the display screen at a rate derived from the video clock signal; and

a regulator circuit coupled to the video processing circuit and the clock generator, said regulator circuit supplying voltage to said video processing circuit at a rate based on the regulator clock signal.

2. The apparatus of claim 1, wherein the video processing circuit comprises a video processor and a video converter that is coupled to the video processor.

3. The apparatus of claim 2, wherein said regulator circuit comprises a primary switching regulator, a first secondary switching regulator and a second secondary switching regulator;

the display screen and the first and second secondary switching regulators being coupled to receive converted voltage from the primary switching regulator, wherein the first secondary switching regulator provides a first regulated voltage to the video converter and the second secondary switching regulator provides a second regulated voltage to the video processor;

and wherein the clock generator provides a first regulator clock signal to the primary switching regulator and a second regulator clock signal to the first and second secondary switching regulators.

4. The apparatus of claim 3, wherein first regulator clock signal has a first frequency that is a multiple of the video clock signal.

5. The apparatus of claim 4, wherein the second regulator clock signal has a second frequency that is a multiple of the video clock signal.

6. The apparatus of claim 1, wherein the clock generator comprises:

a clock oscillator that generates a clock signal; and

a counter coupled to the clock oscillator that generates the video clock signal and the regulator clock signal based on the clock signal.

7. An apparatus for reducing interference on a display screen in an in-flight entertainment system, comprising:

a power supply that provides supply voltage;

a clock generator that provides a video clock signal and a regulator clock signal having a frequency that is a multiple of a frequency of the video clock signal;

a video processing circuit coupled to the clock generator that provides video data to the display screen at a rate derived from the video clock signal;

a regulator circuit coupled to the power supply, the video processing circuit and the clock generator, said regulator circuit supplying regulated voltage to said video processing circuit at a rate based on the regulator clock signal; and

the display screen coupled to the video processing circuit that displays the video data.

8. The apparatus of claim 7, wherein the video processing circuit comprises a video processor and a video converter that is coupled to the video processor.

9. The apparatus of claim 8, wherein said regulator circuit comprises a primary switching regulator, a first secondary switching regulator and a second secondary switching regulator;

the display screen and the first and second secondary switching regulators being coupled to receive converted voltage from the primary switching regulator, wherein the first secondary switching regulator provides a first regulated voltage to the video converter and the second secondary switching regulator provides a second regulated voltage to the video processor;

and wherein the clock generator provides a first regulator clock signal to the primary switching regulator and a second regulator clock signal to the first and second secondary switching regulators.

10. The apparatus of claim 9, wherein the first regulator clock signal has a first frequency that is a multiple of the video clock signal.

11. The apparatus of claim 10, where in the second regulator clock signal has a second frequency that is a multiple of the video clock signal.

12. The apparatus of claim 7, wherein the clock generator comprises :

a clock oscillator that generates a clock signal; and

a counter coupled to the clock oscillator that generates the video clock signal and the regulator clock signal based on the clock signal.

13. A method for reducing interference on a display screen in an in-flight entertainment system, the interference resulting from power conversion by a power regulator that supplies voltage to the display screen, comprising the steps of:

providing a video clock signal;

providing a regulator clock signal having a frequency that is synchronized to a frequency of the video clock signal;

providing a video processing circuit that provides video data to the display screen at a rate derived from the video clock signal; and

supplying voltage to said video processing circuit at a rate based on the regulator clock signal.

14. The method of claim 13, wherein the frequency of the regulator clock signal is a multiple of the video clock signal frequency.

15. The method of claim 13, wherein in the step of providing video data, said video processing circuit comprises a video processor and a video converter that is coupled to the video processor.

16. The method of claim 13, wherein in the step of supply voltage, said voltage is provided by a regulator circuit that comprises a primary switching regulator, a first secondary switching regulator and a second secondary switching regulator, wherein the display screen and the first and second secondary switching regulators being coupled to receive converted voltage from the primary switching regulator, wherein the first secondary switching regulator provides a first regulated voltage to a video converter and the second secondary switching regulator provides a second regulated voltage to a video processor;

and wherein the step of providing a regulated clock signal comprises the steps of providing a first regulator clock signal to the primary switching regulator and providing a second regulator clock signal to the first and second secondary switching regulators.

17. The method of claim 16, wherein the first regulator clock signal has a first frequency that is a multiple of the video clock signal.

18. The method of claim 16, wherein the second regulator clock signal has a second frequency that is a multiple of the video clock signal.

19. The method of claim 13, wherein in the steps of providing a video clock signal and a regulator clock signal, the video clock signal and regulator clock signal are provided by a clock generator.

20. The method of claim 19, wherein the clock generator comprises:

a clock oscillator that generates a clock signal; and

a counter coupled to the clock oscillator that generates the video clock signal and the regulator clock signal based on the clock signal.