Card assembly having a loop antenna formed of a bare conductor and method for manufacturing the card assembly

• US 6,161,761 A
• Filed: 07/09/1998
• Issued: 12/19/2000
• Est. Priority Date: 07/09/1998
• Status: Expired due to Term

• Current Assignee: Quarterhill Inc. (f/k/a Wi-LAN Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: O'Malley, Grace, Gore, Kiron, Ghaem, Sanjar
• Primary Examiner(s): Le, Thien M.
• Assistant Examiner(s): Felten, Daniel S
• Application Number:
  US09/112,585
• Time in Patent Office: 894 Days
• Field of Search: 235/492, 235/380, 235/488, 235/451, 235/493, 235/449, 343/742, 343/866, 343/873
• US Class Current: 235/492
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/0775 arrangements for connecting the integrated circuit to the antenna

Abstract

A card assembly (10) comprises a polymeric layer (16) having a generally planar surface (24), an integrated circuit component (38) adjacent to the polymeric layer (16), and a loop antenna (24) formed of a bare conductor (32) having ends. The loop antenna (24) comprises a first section (26) embedded into the polymeric layer (16), a second section (28) embedded into the polymeric layer (16), and a transverse section (30) spaced apart from the first section (26) by a dielectric region. The transverse section (30) crosses the first section (26). The ends (34) are electrically coupled to the integrated circuit component (38). The dielectric region preferably comprises a reflowed flash region of the polymeric layer (16) such that the transverse section (30) is encapsulated within the polymeric layer (16). Alternately, the dielectric region comprises a dielectric insert separating the transverse section from the first section.

Claims

1. A card assembly comprising:

a polymeric layer having a generally planar surface;

an integrated circuit component adjacent to the polymeric layer;

a loop antenna formed of a bare conductor having ends, the loop antenna comprising a first section embedded into the polymeric layer at a first depth relative to the generally planar surface, a second section embedded into the polymeric layer, and a transverse section, the transverse section crossing the first section and embedded into the polymeric layer at a second depth relative to the generally planar surface greater than the first depth, the ends being electrically coupled to the integrated circuit component; and

a dielectric region interposed between the first section and transverse section, the dielectric region spacing apart the first section from the transverse section to electrically insulate the first section from the transverse section.

2. The card assembly according to claim 1 wherein the dielectric region comprises a reflowed flash region of the polymeric layer.

3. The card assembly according to claim 1 wherein the dielectric region comprises a dielectric insert separating the transverse section from the first section.

4. The card assembly according to claim 1 further comprising at least one additional polymeric layer affixed to the polymeric layer, the bare conductor comprising a bare wire having a cross-sectional diameter approaching a full thickness of the card assembly.

5. The card assembly according to claim 1 further comprising a conductive medium electrically connecting the ends to the integrated circuit component, the bare conductor comprising a bare wire having a cross-sectional diameter approaching a full thickness of the polymeric layer.

6. The card assembly according to claim 1 wherein the first section comprises an inner turn and wherein the second section comprises an outermost turn and an extension extending from the transverse section to one of the ends.

7. The card assembly according to claim 6 wherein the transverse section defines a boundary between the inner and outermost turn.

8. The card assembly according to claim 1 wherein the first section comprises an outermost turn and an extension extending from the outermost turn to one of the ends and wherein the second section comprises an inner turn.

9. The card assembly according to claim 8 wherein the transverse section defines a boundary between the inner turn and outermost turn.

10. The card assembly according to claim 8 further comprising a second transverse section of the loop antenna equidistantly spaced apart from the first section, the second transverse section mirroring the transverse section.

11. A card assembly comprising:

a polymeric layer having a generally planar surface;

an integrated circuit component adjacent to the polymeric layer;

a loop antenna formed of a bare conductor having ends, the loop antenna comprising a first section embedded into the polymeric layer at a first depth relative to the planar surface, a second section embedded into the polymeric layer at the first depth, and a transverse section embedded into the polymeric layer at a second depth greater than the first depth, the transverse section crossing the first section, the ends being electrically coupled to the integrated circuit component.

12. The card assembly according to claim 11 wherein the bare conductor is generally coplanar except at the transverse section.

13. The card assembly according to claim 11 wherein the transverse section is generally curved around the first section.

14. The card assembly according to claim 11 wherein the transverse section is generally semi-elliptical around first section.

15. The card assembly according to claim 11 wherein the bare conductor comprises a copper wire having a diameter within a range from approximately 2 mils to 20 mils.

16. The card assembly according to claim 11 wherein the bare conductor comprises a bare wire having a cross-sectional diameter approaching a full thickness of the polymeric layer.

17. The card assembly according to claim 11 wherein the card assembly further comprises at least one additional polymeric layer affixed to the polymeric layer, and wherein the bare conductor comprises a bare wire having a cross-sectional diameter approaching a full thickness of the card assembly.

18. The card assembly according to claim 11 wherein the ends comprise a serpentine segment of the bare conductor.

19. A card assembly comprising:

a thermoplastic polymeric layer having a generally planar surface;

a substrate having traces, the substrate being affixed to the polymeric layer;

an integrated circuit component having electrodes electrically connected to the traces;

a loop antenna formed of a bare metallic wire having ends, the loop antenna comprising an inner turn embedded into the polymeric layer at a first depth relative to the planar surface, an outermost turn embedded into the polymeric layer at the first depth, and a transverse section encapsulated within the polymeric layer at a second depth greater than the first depth, the transverse section crossing the inner turn;

a conductive medium electrically connecting the traces to the ends of the loop antenna.

20. The card assembly according to claim 19 wherein the bare conductor is generally coplanar except at the transverse section.

21. The card assembly according to claim 19 wherein the transverse section is generally curved around the inner section.

22. The card assembly according to claim 19 wherein the transverse section is generally semi-elliptical around the inner section.

23. The card assembly according to claim 19 wherein the bare conductor comprises a copper wire having a diameter within a range from approximately 2 mils to 20 mils.

24. The card assembly according to claim 19 wherein the loop antenna has a perimetric outline and an inductance yielding a resonant frequency of greater than 10 MHz.

25. The card assembly according to claim 19 wherein the ends comprise a serpentine segment of the bare conductor.

26. A method for forming a card assembly comprising the steps of:

embedding a first section of a loop of bare conductor into a polymeric layer at a first depth;

embedding a second section of the loop into the polymeric layer at a first depth;

crossing the first section of the loop with a transverse section of the loop extending from the second section and embedded into the polymeric layer at a second depth greater than the first depth;

spacing the transverse section from the first section by a dielectric region associated with the polymeric layer;

fabricating a substrate having conductive traces;

mounting an integrated circuit onto the substrate; and

electrically connecting the traces to the loop.

27. The method according to claim 26 wherein crossing the first section further comprises embedding the transverse section at a second depth into the polymeric layer, the second depth being greater than the first depth.

28. The method according to claim 26 further comprising the step of:

dispensing a dielectric insert over the first section prior to crossing the first section with the transverse section.

29. The method according to claim 26 wherein crossing the first section of the loop comprises ultrasonically embedding the transverse section into the substrate at a greater energy than the first section.

30. The method according to claim 26 wherein crossing the first section of the loop comprises thermally, compressively embedding the transverse section into the substrate at a greater force than the first section.

31. The method according to claim 26 wherein crossing the first section of the loop comprises thermosonically embedding the transverse section into the substrate at a greater force than the first section.

32. The method according to claim 26 wherein the variable time per unit displacement produces the transverse section with a curved dip around the first section.

33. The method according to claim 26 wherein the variable time per displacement produces the transverse region having a substantially semi-elliptical profile around the first section.

34. The method according to claim 26 further comprising the step of:

terminating the bare conductor in a serpentine pattern adapted to receive a conductive medium.

35. The method according to claim 26 further comprising the steps of:

forming a polymeric layer having a recess adapted to receive the integrated circuit component;

affixing a second polymeric layer over the polymeric layer.