BGA type semiconductor device and electronic equipment using the same
First Claim
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1. A semiconductor device, comprising:
- a substrate;
a semiconductor chip disposed on an upper surface of the substrate;
a plurality of pads disposed on a lower surface of the substrate;
said substrate having a first group of through holes connected with signal wirings of the semiconductor chip and formed in an inner part from the periphery of the substrate and a second group of through holes connected to power supply wirings and grounding wirings and formed in a part of the substrate extending from the periphery of a semiconductor chip mounting area;
wherein a wiring length from the power supply wirings and grounding wirings to the pads via the second group of through holes are shorter than lengths from the signal terminals to the pads via the first group of through holes, and the length of the power supply wirings and the grounding wirings formed on the lower surface of the substrate are shorter than the length of the signal wirings; and
wherein the power supply wirings and grounding wirings formed on the lower surface of the substrate are formed such that the power supply wirings and the ground wirings do not run through inter-pad areas.
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Abstract
A BGA type semiconductor device which realizes its high speed operation and high integration density by shortening power supply or grounding wires to reduce its inductance. In the BGA type semiconductor device, the power supply or grounding wires are provided in the vicinity of the center of a BGA board to realize the high-speed operation and high integration density, whereby an electronic circuit or equipment using the BGA type semiconductor device can be made high in operational speed and made sophisticated in function.
72 Citations
6 Claims
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1. A semiconductor device, comprising:
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a substrate; a semiconductor chip disposed on an upper surface of the substrate; a plurality of pads disposed on a lower surface of the substrate; said substrate having a first group of through holes connected with signal wirings of the semiconductor chip and formed in an inner part from the periphery of the substrate and a second group of through holes connected to power supply wirings and grounding wirings and formed in a part of the substrate extending from the periphery of a semiconductor chip mounting area; wherein a wiring length from the power supply wirings and grounding wirings to the pads via the second group of through holes are shorter than lengths from the signal terminals to the pads via the first group of through holes, and the length of the power supply wirings and the grounding wirings formed on the lower surface of the substrate are shorter than the length of the signal wirings; and wherein the power supply wirings and grounding wirings formed on the lower surface of the substrate are formed such that the power supply wirings and the ground wirings do not run through inter-pad areas.
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2. A semiconductor device, comprising:
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a substrate; a semiconductor chip disposed on an upper surface of the substrate; a plurality of pads disposed on a lower surface of the substrate; said substrate having a first group of through holes connected with signal wirings of the semiconductor chip and disposed in an inner part from the periphery of the substrate and a second group of through holes connected with power supply wirings and grounding wirings of the semiconductor chip and disposed in an inner part from the periphery of a semiconductor chip mounting area, said plurality of pads being arranged in an area extending between the first group of through holes and the second group of through holes and also in an area defined by the second group of through holes, wherein the length of wiring from power supply electrodes and grounding electrodes of said semiconductor chip to the pads for power supply and to the pads for grounding is shorter than the length of wiring from the signal electrodes of the semiconductor chip to the pads for the signals of the semiconductor chip, such that power supply noise is reduced when the semi-conductor chip is operated at fast operation speeds, and the length of the power supply wirings and the grounding wirings formed on the lower surface of the substrate are shorter than the length of the signal wirings, and wherein the power supply wirings and grounding wirings formed on the lower surface of the substrate are formed such that the power supply wirings and the ground wirings do not run through inter-pad areas.
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3. A semiconductor device, comprising:
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a substrate having a first group of through holes and a second group of through holes, said second group of the through holes to be disposed in an inner part from the first group of the through holes; a semiconductor chip having signal terminals, power supply terminals and grounding terminals, said semiconductor chip disposed on a first side of the substrate, said signal terminal to be electrically connected with the first group of through holes, said power supply terminal and said grounding terminal to be electrically connected with the second group of through holes; and a plurality of bumps disposed on a second surface of the substrate; wherein lengths from the power supply terminal and the grounding terminals to the bumps via the second group of through holes are shorter than lengths from the signal terminals to the bumps via the first group of through holes, and the length of the power supply wirings and the grounding wirings formed on the lower surface of the substrate are shorter than the length of the signal wirings; and wherein the power supply wirings and grounding wirings formed on the lower surface of the substrate are formed such that the power supply wirings and the ground wirings do not run through inter-pad areas.
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4. A semiconductor device, comprising:
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a substrate having a first group of through holes and a second group of through holes; a semiconductor chip having signal terminals, power supply terminals and grounding terminals, said semiconductor chip disposed on a first surface of the substrate; and a plurality of bumps disposed on a second surface of the substrate; wherein lengths from the power supply terminals and the grounding terminals to the bumps via the second group of through holes are shorter than lengths from the signal terminals to the bumps via the first group of through holes; and wherein the power supply wirings and grounding wirings formed on the lower surface of the substrate are formed such that the power supply wirings and the ground wirings do not run through inter-pad areas.
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5. A semiconductor device, comprising:
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a substrate having a first group of through holes and a second group of through holes, said second group of through holes disposed in an inner part of the substrate from the first group of through holes; a semiconductor chip having signal terminals, power supply terminals and grounding terminals, said semiconductor chip disposed on a first side of the substrate; and a plurality of bumps disposed on a second surface of the substrate; wherein said signal terminals are to be electrically connected with the bumps via the first group of through holes, said power supply terminals and said grounding terminals are to be electrically connected with the bumps via the second group of through holes, and the length of the power supply wirings and the grounding wirings formed on the lower surface of the substrate are shorter than the length of the signal wirings; and wherein the power supply wirings and grounding wirings formed on the lower surface of the substrate are formed such that the power supply wirings and the ground wirings do not run through inter-pad areas.
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6. A semiconductor device, comprising:
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a substrate having a first group of through holes and a second group of through holes, said second group of through holes disposed in an inner part of the substrate, from the first group of through holes; a semiconductor chip having signal terminals, power supply terminals and grounding terminals, said semiconductor chip disposed on a first surface of the substrate, said signal terminals electrically connected with the first group of through holes, said power supply terminals and said grounding terminals electrically connected with the second group of through holes; a plurality of bumps disposed on a second surface of the substrate; wherein a length from the power supply terminals and the grounding terminals to the bump via one of the second group of through holes are shorter than a length from the signal terminals to the bump via one of the first group of through holes so as to reduce power supply noise, and the length of the power supply wirings and the grounding wirings formed on the lower surface of the substrate are shorter than the length of the signal wirings; and wherein the power supply wirings and grounding wirings formed on the lower surface of the substrate are formed such that the power supply wirings and the ground wirings do not run through inter-pad areas.
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Specification