Apparatus and process for verifying honest gaming transactions over a communications network
First Claim
1. Apparatus for verifying honest gaming transactions over a communications network, comprising:
- a host processor for generating a host random number and combining it with a satellite random number to generate a game seed which is used to determine one or more outcomes of the gaming transaction, said host processor receiving a game input from the satellite processor and generating a game result based on (i) said game input, (ii) said game seed, and (iii) predetermined game rules;
said host processor generating a host irreversible transform from said host random number, said host processor sending said game seed, said host random number, said host irreversible transform, and said game result to said satellite processor, anda satellite processor for providing the satellite random number and the game input to said host processor over the communications network, for receiving the game seed and the game outcome from the host processor, and for verifying the honesty of the transaction by (i) generating a game result based on the game input, the game seed, and the predetermined game rules, (ii) comparing the generated game result with the received game result, and (iii) comparing said host irreversible transform with said host random number, wherein said satellite processor re-generates the said game result from said re-generated game seed.
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Abstract
Apparatus and method for verifying honest gaming transactions over a communications network includes structure and process whereby a host processor receives a random number from a satellite processor over the communications network. The host processor generates a game seed based on the random number. The host processor also receives an arbitrary game input from the satellite processor and generates a game result based on the game input, the game seed, and predetermined game rules. The satellite processor provides the random number and the arbitrary game input to the host processor over the communications network, and receives data corresponding to the game seed and the game result from the host processor. The satellite processor verifies the honesty of the transaction by (i) generating a game result based on the game input, the data corresponding to the game seed, and the predetermined game rules, and (ii) compares the generated game result with the received game result. A storage medium is also provided for storing a computer-implemented program to carry out the functions described above.
384 Citations
56 Claims
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1. Apparatus for verifying honest gaming transactions over a communications network, comprising:
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a host processor for generating a host random number and combining it with a satellite random number to generate a game seed which is used to determine one or more outcomes of the gaming transaction, said host processor receiving a game input from the satellite processor and generating a game result based on (i) said game input, (ii) said game seed, and (iii) predetermined game rules;
said host processor generating a host irreversible transform from said host random number, said host processor sending said game seed, said host random number, said host irreversible transform, and said game result to said satellite processor, anda satellite processor for providing the satellite random number and the game input to said host processor over the communications network, for receiving the game seed and the game outcome from the host processor, and for verifying the honesty of the transaction by (i) generating a game result based on the game input, the game seed, and the predetermined game rules, (ii) comparing the generated game result with the received game result, and (iii) comparing said host irreversible transform with said host random number, wherein said satellite processor re-generates the said game result from said re-generated game seed. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. Apparatus for creating and verifying simultaneous data transactions over a communications network, comprising:
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a first processor for; (i) receiving a second processor data input irreversible transform from a second processor over the communications network; (ii) generating a first processor arbitrary data input; (iii) computing a first processor data input irreversible transform from said first processor arbitrary data input; (iv) communicating said first processor data input irreversible transform to the second processor over the communications network; (v) after (i) and (iv), communicating said first arbitrary data input to the second processor over the communications network; (vi) receiving a second processor arbitrary data input from the second processor over the communications network; (vii) after (vi), comparing said second processor irreversible transform with the second processor arbitrary data input received in (vi); and a second processor for; (i) receiving the first processor data input irreversible transform from the first processor over the communications network; (ii) generating a second processor arbitrary data input; (iii) computing the second processor data input irreversible transform from said second arbitrary data input; (iv) communicating said second processor data input irreversible transform to the first processor over the communications network; (v) after (i) and (iv), communicating said second arbitrary data input to the first processor over the communications network; (vi) receiving an arbitrary data input from the first processor over the communications network; (vii) after (vi), comparing said first processor data input irreversible transform with the arbitrary decision input received in (vi) said first and second processors simultaneously determining the other party'"'"'s arbitrary data input, wherein said first processor receives an acknowledgement that said second processor has received said first processor'"'"'s said first processor data input irreversible transform prior to sending said first processor'"'"'s said first processor data input. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29)
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30. Apparatus for verifying secret honest gaming transactions via an honest broker over a communications network, comprising:
a host processor honest broker for; (i) receiving an arbitrary game input from each of two satellite processors over the communications network; (ii) communicating an irreversible transform of the arbitrary game input for each satellite processor to the other satellite processor; (iii) producing a game result using the arbitrary game inputs from the two satellite processors and predetermined game rules; (iv) providing the game result to the satellite processors over the communications network; and (v) after (iv), providing all of the arbitrary game inputs to each of the satellite processors over the communications network; and two satellite processors, each for; (i) determining an arbitrary game input; (ii) providing the arbitrary game input to the host processor over the communications network; (iii) receiving the irreversible transform of the arbitrary game input of the other satellite processor; (iv) receiving the game result from the host processor over the communications network; (v) storing the game result; (vi) receiving the other satellite processor'"'"'s game input from the host processor over the communications network; (vii) storing the other satellite processor'"'"'s game input; and (viii) verifying the gaming transaction by (a) generating a game result from the other satellite processor'"'"'s arbitrary game input, the stored arbitrary game input, and the stored predetermined game rules, (b) comparing the generated game result with the stored game result, and (c) validating the other processor'"'"'s arbitrary game input by processing it through an irreversible transform and comparing it to the previously received irreversible transform, wherein said host processor and said satellite processors use transaction processing techniques to ensure the reliable exchange of information. - View Dependent Claims (31, 32, 33, 34, 35, 36)
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37. Apparatus for creation of a collaborative random output over a communications network, comprising:
a host processor for generating a host random number, said host processor receiving a satellite random number from a satellite processor and generating a transaction seed based on said satellite random number and said host random number, said host processor generating an irreversible transform from the host random number and providing it to said satellite processor before receiving an arbitrary transaction input from said satellite processor, said host processor using (i) the received arbitrary transaction input and (ii) the transaction seed to determine a transaction outcome.
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38. Apparatus for creating and verifying data transactions over a communications network having a first processor and a second processor in communication therewith, said apparatus comprising:
the first processor for; (i) receiving a second processor data input irreversible transform from the second processor over the communications network; (ii) generating a first processor arbitrary data input; (iii) computing a first processor data input irreversible transform from said first processor arbitrary data input; (iv) communicating said first processor data input irreversible transform to the second processor over the communications network; (v) after (i) and (iv), communicating said first arbitrary data input to the second processor over the communications network; (vi) receiving a second processor arbitrary data input from the second processor over the communications network; (vii) after (vi), comparing said second processor irreversible transform with the second processor arbitrary data input received in (vi). - View Dependent Claims (40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50)
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39. Apparatus for creating and verifying data transactions over a communications network having a first processor and a second processor in communication therewith, said apparatus comprising:
the second processor for; (i) receiving a first processor data input irreversible transform from the first processor over the communications network; (ii) generating a second processor arbitrary data input; (iii) computing a second processor data input irreversible transform from said second arbitrary data input; (iv) communicating said second processor data input irreversible transform to the first processor over the communications network; (v) after (i) and (iv), communicating said second arbitrary data input to the first processor over the communications network; (vi) receiving an arbitrary data input from the first processor over the communications network; (vii) after (vi), comparing said first processor data input irreversible transform with the arbitrary decision input received in (vi).
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51. Apparatus for creating and verifying secret data transactions over a communications network, comprising:
a first processor for; (i) generating a first processor secret arbitrary data input; (ii) computing a first processor data input irreversible transform from said first processor arbitrary data input; (iii) communicating said first processor data input irreversible transform to a second processor over the communications network; and (iv) after (i) and (iii), communicating said first secret arbitrary data input to a second processor over the communications network. - View Dependent Claims (52, 55, 56)
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53. Apparatus for creating and verifying secret data transactions over a communications network, comprising:
a second processor for; (i) receiving a first processor data input irreversible transform over a communications network; (ii) receiving a first processor secret arbitrary data input over a communications network; and (iii) after (i) and (ii), comparing the said first processor data input irreversible transform with the irreversible transform of the said first processor secret arbitrary data input that the said second processor computes. - View Dependent Claims (54)
Specification