Element isolation method for semiconductor devices including etching implanted region under said spacer to form a stepped trench structure

• US 6,165,870 A
• Filed: 06/29/1999
• Issued: 12/26/2000
• Est. Priority Date: 06/30/1998
• Status: Expired due to Term

• Current Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Original Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Inventors: Koo, Bon Seong, Shim, Hyun Woong
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): POMPEY, RON EVERETT
• Application Number:
  US09/342,501
• Time in Patent Office: 546 Days
• Field of Search: 438/424, 438/433, 438/555, 438/704
• US Class Current: 438/424
• CPC Class Codes: H01L 21/76232 of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls H01L21/76229 takes precedence

Abstract

An element isolation method, in particular, a shallow trench isolation (STI) method for semiconductor devices is disclosed in which a trench is formed to have a stepped structure shaped in such a fashion that it has a smaller width at its lower portion than at its upper portion. This stepped trench structure, which includes at least one step, is capable of obtaining an increased metal contact margin, thereby preventing metal contacts from being short-circuited with wells due to a misalignment thereof.

Claims

1. A method for fabricating an element isolation structure in a semiconductor device, comprising the steps of:

forming a pad oxide film over a semiconductor substrate;

forming a nitride film pattern over said semiconductor substrate except for a portion will be formed an element insulating film;

forming spacers at side walls of the nitride film pattern;

implanting ions into said semiconductor substrate disposed beneath said pad oxide film exposed between said side walls using said spacers and said nitride film pattern as a mask, thereby forming an ion-implanted region;

selectively removing said pad oxide film, said ion-implanted region, and said semiconductor substrate using said nitride film pattern and said spacer as a mask, thereby forming a trench in said semiconductor substrate;

removing said ion-implanted region remaining after said selective removal thereof;

forming a trench oxide film over the entire exposed surface of the resulting structure obtained after said removal of said ion-implanted region, thereby filling the trench; and

selectively removing said trench oxide film and said spacers in accordance with a blanket etching process, thereby forming an element isolating film.

2. The method as claimed in claim 1, further comprising the step of annealing the structure obtained after said ion implantation.

3. The method as claimed in claim 1, wherein said ion-implanted region extends laterally to portions of said semiconductor substrate disposed beneath said spacers.

4. The method as claimed in claim 1, wherein said step of removing said ion-implanted region remaining after said selective removal thereof is conducted using a wet etch process.

5. The method as claimed in claim 1, wherein said spacers are comprised of a silicon oxide film.

6. The method as claimed in claim 1, wherein said element isolation film is comprised of said trench oxide film and said spacers remaining after further said selective removal thereof.

7. A method for fabricating an element isolation structure in a semiconductor device, comprising the steps of:

providing a semiconductor substrate;

sequentially forming a pad oxide film and a nitride film over said semiconductor substrate;

forming a photoresist film pattern over said nitride film, and selectively removing said nitride film by using said nitride film as a mask, thereby forming a nitride film pattern;

removing said photoresist film pattern, and then forming spacers at the side walls of said nitride film pattern;

implanting ions in a portion of said semiconductor substrate disposed beneath an exposed portion of said pad oxide film between said side walls by using said spacers and said nitride film pattern as a mask, thereby forming an ion-implanted region;

selectively removing said pad oxide film, said ion-implanted region, and said semiconductor substrate by using said nitride film pattern and said spacers as a mask, thereby forming a trench in said semiconductor substrate;

removing said ion-implanted region remaining after said selective removal thereof;

forming a trench oxide film over the entire exposed surface of the resulting structure obtained after said removal of said ion-implanted region, thereby filling said trench with said trench oxide film;

selectively removing said trench oxide film and said spacers in accordance with an blanket etching process;

further selectively removing said trench oxide film and said spacers; and

removing said nitride film pattern and said pad oxide film, thereby forming an element isolation film.

8. The method as claimed in claim 7, further comprising the step of annealing the structure obtained after said ion implantation.

9. The method as claimed in claim 7, wherein said ion-implanted region extends laterally to portions of said semiconductor substrate disposed beneath said spacers.

10. The method as claimed in claim 7, wherein said step of removing said ion-implanted region remaining after said selective removal thereof is conducted using a wet etch process.

11. The method as claimed in claim 7, wherein said spacers are comprised of a silicon oxide film.

12. The method as claimed in claim 7, wherein said element isolation film is comprised of said trench oxide film and said spacers remaining after further said selective removal thereof.