Analog successive approximation (SAR) analog-to-digital converter (ADC)

• US 6,167,132 A
• Filed: 03/04/1998
• Issued: 12/26/2000
• Est. Priority Date: 04/22/1997
• Status: Expired due to Fees

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Scott, Jeffrey W., Krone, Andrew W., Welland, David R., Sooch, Navdeep S.
• Primary Examiner(s): Dorvil, Richemond
• Assistant Examiner(s): Chawan, Vijay B
• Application Number:
  US09/034,432
• Time in Patent Office: 1,028 Days
• Field of Search: 344/143, 344/155, 344/156, 344/158, 379/399-412
• US Class Current: 379/399.01
• CPC Class Codes: H04L 25/0266 Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling
• CPC Class Codes: H04L 25/06 Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
• CPC Class Codes: H04L 7/033 using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
• CPC Class Codes: H04M 1/573 Line monitoring circuits for detecting caller identification
• CPC Class Codes: H04M 11/06 Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors
• CPC Class Codes: H04M 19/001 Current supply source at the exchanger providing current to substations
• CPC Class Codes: H04M 19/02 providing ringing current or supervisory tones, e.g. dialling tone or busy tone

Abstract

An analog successive approximation (SAR) analog-to-digital converter (ADC) is disclosed that is a compromise between a SAR ADC implementation and a fully parallel thermometer-to-binary ADC. The analog SAR ADC utilizes N comparators for N bits of output and does not require a clock system, control logic, decode logic, or thermometer-to-binary decode circuitry. Conversion speed is determined by the comparator rate, and the comparator outputs may be used directly as the ADC outputs. The analog SAR ADC disclosed is a low complexity, low-precision analog-to-digital converter (ADC) that may be used to digitize phone line status information so that it may be communicated across a isolation barrier as digital information.

Claims

1. A communication system, comprising:

phone line side circuitry capable of being coupled to phone lines;

powered side circuitry capable of being coupled to said phone line side circuitry through an isolation barrier; and

an analog-to-digital converter within said phone line side circuitry including a plurality of comparators having outputs that make up a multiple-bit digital value to be transmitted across said isolation barrier,

wherein the multiple-bit digital value is indicative of phone line status information.

2. The communication system of claim 1, further comprising said isolation barrier coupled between said phone line side circuitry and said powered side circuitry.

3. The communication system of claim 2, wherein said isolation barrier comprises one or more capacitors.

4. The communication system of claim 3, wherein digital information is communicated across said isolation barrier.

5. The communication system of claim 1, wherein said desired phone line status information is a DC loop current level.

6. The communication system of claim 1, wherein said analog-to-digital converter has an N-bit output and comprises N comparators.

7. The communication system of claim 6, wherein said analog-to-digital converter has a voltage input and further comprises a voltage reference circuit that provides 2^N reference voltage levels.

8. The communication system of claim 6, wherein said analog-to-digital converter has a current input and further comprises current reference circuits that provides 2^N reference current levels.

9. The communication system of claim 8, wherein said N comparators comprise N CMOS inverters.

10. A method for converting an analog signal into a digital value in a communication system capable of being connected to phone lines, comprising:

coupling an isolation barrier between powered side circuitry and phone line side circuitry capable of being connected to phone lines;

receiving an analog signal, the analog signal being indicative of phone line status information within said phone line side circuitry; and

converting said analog signal to a multiple-bit digital value utilizing a plurality of comparators having outputs that make up said multiple-bit digital value.

11. The method of claim 10, further comprising transmitting said multiple-bit digital value across said isolation barrier.

12. The method of claim 11, wherein said isolation barrier is capacitive.

13. The method of claim 10, wherein said converting step comprises utilizing N comparators to produce an N-bit digital value.

14. An analog successive approximation (SAR) analog-to-digital converter (ADC) for digitizing an analog signal, comprising:

reference circuitry;

a plurality of comparators coupled to said reference circuitry and an input signal and having outputs that make up a multiple-bit digital output value; and

at least one of said plurality of comparators having an output coupled to said reference circuitry to control in part a reference signal received by another of said plurality of comparators.

15. The analog SAR ADC of claim 14, wherein said multiple-bit digital output value is an N-bit digital value and wherein there are N comparators.

16. The analog SAR ADC of claim 15, wherein said input signal is a voltage input and wherein said reference circuitry comprises a voltage reference circuit that provides 2^N reference voltage levels.

17. The analog SAR ADC of claim 16, further comprising N-1 multiplexers.

18. The analog SAR ADC of claim 15, wherein said input signal is a current input and wherein said reference circuitry comprises a current reference circuitry that provides 2^N reference current levels.

19. The analog SAR ADC of claim 18, wherein said N comparators comprise N CMOS inverters.

20. The analog SAR ADC of claim 18, further comprising a current input circuit connected to N mirror circuits, one of said N mirror circuits being coupled to each comparator to provide said current input to each said comparator.

21. The analog SAR ADC of claim 20, wherein said current input circuit comprises a MOS transistor and said N mirror circuits each comprise a MOS transistor, said MOS transistors having their gate terminals coupled together.

22. The analog SAR ADC of claim 18, further comprising a reference current input circuit connected to N current reference circuits, one of said N current reference circuits being coupled to each comparator to provide a reference current input to each said comparator.

23. The analog SAR ADC of claim 22, wherein said reference current input circuit comprises a MOS transistor and a reference current source and wherein said N current reference circuits comprise MOS transistors, said MOS transistors having their gate terminals coupled together.

24. The analog SAR ADC of claim 23, wherein said N current reference circuits comprise at least:

a first stage current reference circuit comprising a MOS transistor coupled to a first comparator, said first comparator having an output representing a most-significant-bit of said multiple-bit digital output value; and

a second stage current reference circuit comprising two MOS transistors coupled to a second comparator, one of said two MOS transistors coupled to a switch that is controlled by said output of said first comparator, and said second comparator having an output representing a most-significant-bit less one of said multiple-bit digital output value;

said MOS transistors having their gate terminals coupled together.

25. The analog SAR of claim 24, wherein said MOS transistors within said N current reference circuits are sized with respect to said MOS transistor within said reference current input circuit to provide desired current levels to said N comparators.

26. The analog SAR ADC of claim 14, wherein said input signal is a DC loop current monitor signal for phone line side circuitry that may be connected to phone lines.

27. A method for converting an analog signal into a digital value, comprising:

receiving an analog signal;

generating a plurality of reference signals and applying them to a plurality of comparators having outputs that make up a multiple-bit digital value;

controlling in part a reference signal received by at least one of said plurality of comparators with an output from another of said plurality of comparators; and

converting said analog signal to said multiple-bit digital value utilizing said plurality of comparators.

28. The method of claim 27, wherein said receiving step comprises receiving a phone line status signal within phone line side circuitry that may be connected to phone lines as said analog signal.

29. The method of claim 27, wherein said converting step comprises utilizing N comparators and said digital value is an N-bit value.

30. The method of claim 27, wherein said analog signal is a voltage input and said converting step comprises generating 2^N reference voltage levels.

31. The method of claim 30, further comprising controlling reference voltage levels with outputs from at least one of said N comparators.

32. The method of claim 27, wherein said analog signal is a current input and said converting step comprises generating 2^N reference current levels.

33. The method of claim 32, further comprising controlling reference current levels with outputs from at least one of said N comparators.