Data transfer method/engine for pipelining shared memory bus accesses

• US 6,167,475 A
• Filed: 07/06/1998
• Issued: 12/26/2000
• Est. Priority Date: 07/06/1998
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Carr, Jeffery D.
• Primary Examiner(s): Pan, Daniel H.
• Application Number:
  US09/111,110
• Time in Patent Office: 904 Days
• Field of Search: 711/148, 711/146, 711/147, 711/154, 711/153, 711/150, 711/169, 148/407, 148/409, 148/145, 709/213, 710/200, 710/129, 710/241, 710/61, 710/126, 710/52, 710/113, 710/64
• US Class Current: 710/113
• CPC Class Codes: G06F 13/1615 using a concurrent pipeline structrure

Abstract

A data transfer engine, method and article of manufacture are provided for use in a functional unit of an integrated system for enhanced access and transfer of data over a shared data bus. The data transfer technique comprises pipelining data transfer requests onto the shared bus. The technique involves receiving and storing a first transfer parameter set in a primary parameter register within the data transfer structure, and receiving and storing a second transfer parameter set in a secondary parameter register within the transfer structure. Thereafter, data is transferred using the shared memory bus in response to the first transfer parameter set and the second transfer parameter set without relinquishing access to the shared memory bus between transferring of data in response to the different parameter sets. A situational wait decision is preferably implemented in practice to decide whether to pipeline consecutive data transfer requests based upon the characteristics of the first transfer parameter set and/or the second transfer parameter set, as well as the identities of the requesters providing the first transfer parameter set and the second transfer parameter set.

Claims

1. A method of transferring data using a shared memory bus, comprising the steps of:

receiving and storing a first transfer parameter set in a primary parameter register;

receiving and storing a second transfer parameter set in a secondary parameter register; and

transferring data with said shared memory bus in response to said first parameter set and said second parameter set without relinquishing access to said shared memory bus between transferring of data in response to said first parameter set and transferring of data in response to said second parameter set.

2. The method of claim 1, wherein said first parameter set is received from a plurality of data requesters, and said second parameter set is received from said plurality of data requesters, and wherein said plurality of data requesters comprise data requesters of a video decoder chip.

3. The method of claim 1, further comprising determining for each transfer parameter set whether said transfer parameter set comprises a write data request, and when said transfer parameter set comprises a write data request, said method further comprising staging said write data prior to said transferring data.

4. The method of claim 1, further comprising prior to said receiving and storing of said second transfer parameter set, determining whether to wait transferring data with said shared memory bus in response to said first parameter set until said receiving and storing of said second transfer parameter set in said secondary parameter register, said determining comprising a wait decision based upon at least one of a characteristic of said first transfer parameter set, a characteristic of said second transfer parameter set, identity of a data requester issuing said first transfer parameter set and identity of a data requester issuing said second transfer parameter set.

5. The method of claim 4, wherein said wait decision is based on said characteristic of said second transfer parameter set, said characteristic of said second parameter set comprising a data burst length pursuant to the second transfer parameter set.

6. The method of claim 4, wherein said wait decision is based on said characteristic of said first parameter set and said characteristic of said second parameter set, each said characteristic comprising a type of data transfer operation, said type of data transfer operation comprising a read operation or a write operation, and wherein said wait decision comprises waiting for receipt of said second parameter set when said first transfer parameter set and said second transfer parameter set both comprise write operations or both comprise read operations.

7. The method of claim 4, wherein said identity of said data requester issuing said second transfer parameter set is employed by said wait decision to determine priority of said second transfer parameter set, said priority of said second transfer parameter set determining whether to wait for receipt of said second transfer parameter set before transferring data with said shared memory bus in response to said first parameter set.

8. The method of claim 1, wherein said transferring data comprises:

asserting a data transfer request on the shared memory bus;

putting at least a portion of the first transfer parameter set onto the shared memory bus;

receiving a first parameter set acknowledgment from an arbiter of the shared memory bus;

putting at least a portion of the second transfer parameter set onto the shared memory bus; and

receiving a second parameter set acknowledgment from said arbiter of the shared memory bus.

9. The method of claim 1, further comprising transferring said second transfer parameter set to said primary parameter register upon initiating transferring of data with said shared memory bus in response to said first transfer parameter set, and receiving and storing an additional transfer parameter set in said secondary parameter register, said transferring data including transferring data with said shared memory bus in response to said additional transfer parameter set without relinquishing access to said shared memory bus from said transferring data in response to said second transfer parameter set.

10. The method of claim 9, further comprising repeating said receiving and storing for n additional transfer parameter sets and said transferring data in response thereto without relinquishing access of said shared memory bus between transferring of data in response to each of said transfer parameter sets, wherein n>

2, and wherein at least n data transfers can be pipelined without relinquishing access to said shared memory bus in response to said n additional transfer parameter sets received and processed through said primary parameter register and said secondary parameter register.

11. The method of claim 1, further comprising transferring at least a portion of said first transfer parameter set from said primary parameter register to an active parameter register after receipt of an acknowledgment from said shared memory bus for initiating said transferring data in response to said first transfer parameter set, said first transfer parameter set being transferred to said active parameter register for use during said transferring data.

12. A method of transferring data with a shared data bus, comprising the steps of:

accepting a first transfer parameter set from one of a plurality of data requesters, and storing said first transfer parameter set in a primary parameter register;

subsequent to said storing of said first parameter set, dynamically determining whether to wait for a second transfer parameter set from one of said plurality of data requesters, and if waiting, thereafter receiving and storing said second transfer parameter set in a secondary parameter register;

subsequent to storing of said second transfer parameter set, or if not waiting for said second transfer parameter set, requesting access to said shared data bus and transferring data with said data bus in response to said first transfer parameter set; and

if said second transfer parameter set has been received, transferring data with said data bus in response to said second transfer parameter set, without relinquishing access to said data bus between said transferring of data in response to said first transfer parameter set and said transferring of data in response to said second transfer parameter set.

13. The method of claim 12, wherein said first transfer parameter set is received from a plurality of data requesters, and said second transfer parameter set is received from said plurality of data requesters, and wherein said plurality of data requesters comprise requesting units of a video decoder, and wherein said shared data bus comprises a shared memory bus for use in accessing external memory.

14. The method of claim 12, further comprising determining for each transfer parameter set whether said transfer parameter set comprises a write data request, and when said transfer parameter set comprises a write data request, said method further comprising staging data to be written, said staging occurring prior to said transferring of data.

15. The method of claim 12, wherein said dynamically determining whether to wait comprises dynamically deciding based upon at least one of a characteristic of said first transfer parameter set, a characteristic of said second transfer parameter set, identity of a data requester issuing said first transfer parameter set and identity of a data requester issuing said second transfer parameter set.

16. The method of claim 15, wherein said characteristic of said first transfer parameter set comprises at least one of a data burst length or a type of data transfer operation required by said first transfer parameter set, and wherein said characteristic of said second transfer parameter set comprises a data burst length or a type of data transfer operation required by said second transfer parameter set.

17. The method of claim 15, wherein said identity of said data requester issuing said second transfer parameter set is employed to determine priority of said second transfer parameter set, said priority being employed during said dynamically deciding whether to wait for receipt of said second transfer parameter set before transferring data with said shared memory bus in response to said first transfer parameter set.

18. A data transfer engine for a bus access controller of a functional unit in an integrated system having a shared data bus coupling the functional unit to an external device, said data transfer engine comprising:

a primary parameter register for receiving and storing a first transfer parameter set;

a secondary parameter register for receiving and storing a second transfer parameter set; and

control logic for initiating and controlling transfer of data across said shared data bus in response to said first transfer parameter set and said second transfer parameter set without relinquishing access to said shared data bus between transferring of data in response to said first transfer parameter set and transferring of data in response to said second transfer parameter set.

19. The data transfer engine of claim 18, wherein said functional unit comprises a video decode unit, said external device comprises external memory, and said shared data bus comprises a shared memory bus.

20. The data transfer engine of claim 18, wherein said functional unit comprises a plurality of data requesters, and wherein said first transfer parameter set and said second transfer parameter set are each received from said plurality of data requesters.

21. The data transfer engine of claim 18, wherein said external device comprises memory, and said integrated system comprises a memory controller, said memory controller further comprising an arbiter for said initiating of said transfer of data across said shared data bus.

22. The data transfer engine of claim 18, wherein said control logic further comprises an active parameter register coupled to said primary parameter register for receiving said first transfer parameter set therefrom upon said initiating of transfer of data across said shared data bus in response to said first transfer parameter set, wherein said first transfer parameter set is retained within said active parameter register for use by said control logic for said controlling said transfer of data across said shared data bus.

23. The data transfer engine of claim 18, wherein said control logic comprises a first data path for a transfer parameter set comprising a write request and a second data path for a transfer parameter set comprising a read request, said first data path for said write request comprising write data staging registers for internally storing data to be written in response to said transfer parameter set comprising said write request, said internally storing occurring prior to initiating of said transfer of data.

24. The data transfer engine of claim 23, wherein said control logic further comprises a read data path for receiving read data transferred across said shared data bus in response to said transfer parameter set comprising said read request.

25. The data transfer engine of claim 18, wherein said control logic comprises means for asserting a request to transfer data across said shared data bus in response to said first transfer parameter set and thereafter without relinquishing access to said shared data bus means for asserting a request to transfer data in response to said second transfer parameter set.

26. The data transfer engine of claim 18, wherein said control logic comprises means for dynamically determining whether to wait transferring data with said shared data bus in response to said first parameter set until receiving and storing said second transfer parameter set in said secondary parameter register, said means for dynamically determining comprising means for dynamically deciding based upon at least one of a characteristic of said first transfer parameter set, a characteristic of said second transfer parameter set, identity of a data requester issuing said first transfer parameter set and identity of a data requester issuing said second transfer parameter set.

27. The data transfer engine of claim 26, wherein said characteristic of said first transfer parameter set comprises at least one of a data burst length or a type of data transfer operation required by said first transfer parameter set, and wherein said characteristic of said second transfer parameter set comprises a data burst length or a type of data transfer operation required by said second transfer parameter set.

28. The data transfer engine of claim 26, wherein said identity of said data requester issuing said second transfer parameter set is employed to determine priority of said second transfer parameter set, and wherein said means for dynamically determining comprises means for employing said priority to determine whether to wait for receipt of said second transfer parameter set before transferring data with said shared memory bus in response to said first transfer parameter set.

29. A data transfer engine for a bus access controller of a functional unit in an integrated system having a shared data bus coupling the functional unit to an external device, said data transfer engine comprising:

means for accepting a first transfer parameter set from one of a plurality of data requesters within the functional unit, and for storing said first transfer parameter set in a primary parameter register;

means for dynamically determining whether to wait for a second transfer parameter set from one of said plurality of data requesters, and if waiting, for receiving and storing said second transfer parameter set in a secondary parameter register;

means for requesting access to said shared data bus and for transferring data with said data bus in response to said first transfer parameter, said transferring data occurring after storing said second transfer parameter set or if not waiting for said second transfer parameter set; and

means for transferring data with said shared data bus in response to said second transfer parameter set if said second transfer parameter set has been received, without relinquishing access to said shared data bus between said transferring of data in response to said first parameter set and said transferring of data in response to said second parameter set.

30. The data transfer engine of claim 29, wherein said functional unit comprises a video decode unit, and wherein said shared data bus comprises a shared memory bus for use in accessing shared memory.

31. The data transfer engine of claim 29, further comprising for each transfer parameter set means for determining whether said transfer parameter set comprises a write data request, and if so, means for staging data to be written in at least one write staging register prior to said transferring of data.

32. The data transfer engine of claim 29, wherein said means for dynamically determining whether to wait comprises means for dynamically deciding based upon at least one of a characteristic of said first transfer parameter set, a characteristic of said second transfer parameter set, identity of a data requester issuing said first transfer parameter set and identity of a data requester issuing said second transfer parameter set.

33. The data transfer engine of claim 32, wherein said characteristic of said first transfer parameter set comprises at least one of data burst length or a type of data transfer operation required by said first transfer parameter set, and wherein said characteristic of said second transfer parameter set comprises a data burst length or a type of data transfer operation required by said second transfer parameter set.

34. The data transfer engine of claim 32, wherein said identity of said data requester issuing said second transfer parameter set is employed to determine priority of said second transfer parameter set, and wherein said means for dynamically deciding employs said priority to determine whether to wait for receipt of said second transfer parameter set before transferring data with said shared memory bus in response to said first transfer parameter set.

35. An integrated system comprising:

at least one shared data bus;

multiple functional units coupled to said at least one shared data bus for sending requests thereon to access at least one external device to be coupled to the integrated system; and

a bus access controller for a functional unit of said multiple functional units in said integrated system, said bus access controller comprising a data transfer engine, said data transfer engine comprising;

(i) a primary parameter register for receiving and storing a first transfer parameter set;

(ii) a secondary parameter register for receiving and storing a second transfer parameter set; and

(iii) control logic for initiating and controlling transfer of data across said at least one shared data bus in response to said first transfer parameter set and said second transfer parameter set without relinquishing access to said at least one shared data bus between transferring of data in response to said first transfer parameter set and transferring of data in response to said second transfer parameter set.

36. The integrated system of claim 35, wherein said functional unit having said bus access controller comprises a video decode unit, and wherein said at least one external device comprises at least one external memory, and said at least one shared data bus comprises at least one shared memory bus coupling said video decode unit to said at least one external memory.

37. An article of manufacture, comprising:

at least one computer usable medium having computer readable program code means embodied therein for causing pipelined data transfer using a shared data bus, the computer readable program code means in the article of manufacture comprising;

(i) computer readable program code means for causing a computer to receive and store a first transfer parameter set;

(ii) computer readable program code means for causing a computer to receive and store a second transfer parameter set; and

(iii) computer readable program code means for causing a computer to transfer data with said shared data bus in response to said first transfer parameter set and in response to said second transfer parameter set without relinquishing access to said shared data bus between transferring of data in response to said first parameter set and transferring of data in response to said second parameter set.

38. An article of manufacture, comprising:

at least one computer usable medium having computer readable program code means embodied therein for causing transferring of data with a shared data bus, the computer readable program code means in the article of manufacture comprising;

(i) computer readable program code means for causing a computer to accept a first transfer parameter set from one of a plurality of data requesters, and for storing said first transfer parameter set in a primary parameter register;

(ii) computer readable program code means for causing a computer to determine whether to wait for a second transfer parameter set from one of said plurality of data requesters, and if waiting, for receiving and storing said second transfer parameter set in a secondary parameter register;

(iii) computer readable program code means for causing a computer to request access to said shared data bus and to transfer data with said data bus in response to said first transfer parameter set after storing said second transfer parameter set or if not waiting for said second transfer parameter set; and

(iv) computer readable program code means for causing a computer to transfer data with said shared data bus in response to said second transfer parameter set if said second transfer parameter set has been received, said transfer being without relinquishing access to said data bus between said transferring of data in response to said first transfer parameter set and said transferring of data in response to said second transfer parameter set.