Method of fabricating semiconductor device
First Claim
1. A method of fabricating a semiconductor device comprising the steps of:
- (a) forming a trench in a semiconductor substrate having a first semiconductor region of a first conductivity type, from a major surface of the first semiconductor region in the semiconductor substrate in a depth direction of the first semiconductor region thereby to form divided portions of the first semiconductor region which are separated by the trench;
(b) forming a gate insulating film, including a lower layer of a thermal oxide film and an upper layer of a deposition film, over the internal surface of the trench formed in the first semiconductor region;
(c) forming a gate electrode over the gate insulating film in the trench;
(d) introducing, after said step (c), impurities into the semiconductor substrate to form a second semiconductor region of a second conductivity type in each of the divided portions of the first semiconductor region; and
(e) introducing, after said step (c), impurities into the semiconductor substrate to form a third semiconductor region of the first conductivity type in each of the divided portions of the first semiconductor region, whereby the resultant second semiconductor region is formed at a place deeper than the third semiconductor region, and the second semiconductor region is formed between the third semiconductor region and the resultant first semiconductor region in the depth direction.
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Accused Products
Abstract
In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
263 Citations
23 Claims
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1. A method of fabricating a semiconductor device comprising the steps of:
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(a) forming a trench in a semiconductor substrate having a first semiconductor region of a first conductivity type, from a major surface of the first semiconductor region in the semiconductor substrate in a depth direction of the first semiconductor region thereby to form divided portions of the first semiconductor region which are separated by the trench;
(b) forming a gate insulating film, including a lower layer of a thermal oxide film and an upper layer of a deposition film, over the internal surface of the trench formed in the first semiconductor region;
(c) forming a gate electrode over the gate insulating film in the trench;
(d) introducing, after said step (c), impurities into the semiconductor substrate to form a second semiconductor region of a second conductivity type in each of the divided portions of the first semiconductor region; and
(e) introducing, after said step (c), impurities into the semiconductor substrate to form a third semiconductor region of the first conductivity type in each of the divided portions of the first semiconductor region, whereby the resultant second semiconductor region is formed at a place deeper than the third semiconductor region, and the second semiconductor region is formed between the third semiconductor region and the resultant first semiconductor region in the depth direction. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
etching the top edge portion and the bottom edge portion of the trench between said step (a) and said step (b) to form the top edge portion and the bottom edge portion into gently-sloping shapes, respectively.
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6. A method of fabricating a semiconductor device according to claim 1, further comprising the steps of:
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forming a sacrificial thermal oxide film over the internal surface of the trench; and
removing the sacrificial thermal oxide film, said thermal oxide forming and removing steps being conducted between said step (a) and said step (b).
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7. A method of fabricating a semiconductor device according to claim 6, wherein the sacrificial thermal oxide film is formed in an oxygen gas atmosphere of 1,000°
- C. or higher or in an oxygen gas atmosphere diluted with a nitrogen gas.
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8. A method of fabricating a semiconductor device according to claim 1, wherein the deposition film is formed by a chemical vapor deposition method, the deposition film being a silicon oxide film, a silicon nitride film or an acid nitride film.
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9. A method of fabricating a semiconductor device comprising the steps of:
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(a) etching a semiconductor substrate having a first semiconductor region of a first conductivity type which serves as a drain region, by using an opening of a silicon nitride film formed over a major surface of the first semiconductor region, to form a trench from the major surface of the first semiconductor region in the semiconductor substrate in a depth direction of the first semiconductor region, thereby to form divided portions of the first semiconductor region which are separated by the trench;
(b) forming a gate insulating film, including a lower layer of a thermal oxide film and an upper layer of a deposition film, over the internal surface of the trench formed in the first semiconductor region;
(c) forming a gate electrode over the gate insulating film in the trench;
(d) introducing, after said step (c), impurities into the semiconductor substrate to form a second semiconductor region of a second conductivity type, which serves as a channel region, in each of the divided portions of the first semiconductor region; and
(e) introducing, after said step (c), impurities into the semiconductor substrate to form a third semiconductor region of the first conductivity type, which serves as a source region, in each of the divided portions of the first semiconductor region, the resultant second semiconductor region being formed at a place deeper than the third semiconductor region, the second semiconductor region being formed between the third semiconductor region and the resultant first semiconductor region in the depth direction, and the silicon nitride film being removed at least after said step (b). - View Dependent Claims (10, 11, 12, 13, 14)
etching the top edge portion and the bottom edge portion of the trench to form the top edge portion and the bottom edge portion into gently-sloping shapes, respectively, said step being conducted between said step (a) and said step (b).
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11. A method of fabricating a semiconductor device according to claim 9, further comprising the steps of:
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forming a sacrificial thermal oxide film over the internal surface of the trench; and
removing the sacrificial thermal oxide film, said thermal oxide forming and removing steps being conducted between said step (a) and said step (b).
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12. A method of fabricating a semiconductor device according to claim 11, wherein the sacrificial thermal oxide film is formed in an oxygen gas atmosphere of 1,000°
- C. or higher or in an oxygen gas atmosphere diluted with a nitrogen gas.
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13. A method of fabricating a semiconductor device according to claim 9, wherein the thermal oxide film is formed by thermal oxidation in an oxygen gas atmosphere or in a water vapor atmosphere, and the deposition film is formed by a chemical vapor deposition method.
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14. A method of fabricating a semiconductor device according to claim 9, wherein the silicon nitride film is removed after said step (c).
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15. A method of forming a MISFET comprising the steps of:
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(a) etching a silicon nitride film formed over a major surface of a semiconductor substrate to define an opening therein, and etching the semiconductor substrate, by using the opening of the silicon nitride film, to form a trench from the major surface of the semiconductor substrate in a depth direction thereof, thereby forming divided portions of the semiconductor substrate which are separated by the trench;
(b) forming a gate insulating film of the MISFET, including a thermal oxide film and a deposition film overlying the thermal oxide film, over the internal surface of the trench;
(c) forming a gate electrode of the MISFET over the gate insulating film in the trench; and
(d) introducing, after said step (c), impurities into the divided portions of the substrate to form a channel region and a source region of the MISFET, the silicon nitride film being removed at least after said step (b). - View Dependent Claims (16, 17, 18, 19, 20, 21)
in said step (d), impurities are introduced into the divided portions of the semiconductor substrate to form a second semiconductor region of a second conductivity type which serves as the channel region, in said step (d), impurities are introduced into the divided portions of the semiconductor substrate to form a third semiconductor region of the first conductivity type, which serves as the source region, in each of the divided portions of the first semiconductor region, the resultant second semiconductor region is formed at a place deeper than the third semiconductor region, and the second semiconductor region is formed between the third semiconductor region and the resultant first semiconductor region in the depth direction. -
17. A method of forming a MISFET according to claim 15, further comprising the step of:
etching the top edge portion and the bottom edge portion of the trench between said step (a) and said step (b) to form the top edge portion and the bottom edge portion into gently-sloping shapes, respectively.
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18. A method of forming a MISFET according to claim 15, further comprising the steps of:
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forming a sacrificial thermal oxide film over the internal surface of the trench; and
removing the sacrificial thermal oxide film, said thermal oxide forming and removing steps being conducted between said step (a) and said step (b).
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19. A method of forming a MISFET according to claim 18, wherein the sacrificial thermal oxide film is formed in an oxygen gas atmosphere of 1,000°
- C. or higher or in an oxygen gas atmosphere diluted with a nitrogen gas.
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20. A method of forming a MISFET according to claim 15, wherein the thermal oxide film is formed by thermal oxidation in an oxygen gas atmosphere or in a water vapor atmosphere, and the deposition film is formed by a chemical vapor deposition method.
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21. A method of a MISFET according to claim 15, wherein the silicon nitride film is removed after said step (c).
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22. A method of fabricating a metal insulator semiconductor field type semiconductor device, comprising the steps of:
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(a) providing a semiconductor body having opposite first and second major surfaces, said semiconductor body including a semiconductor layer of a first conductivity type, which is exposed to said first major surface and serves as a drain region;
(b) forming a trench from said first major surface to a depth in said semiconductor layer of the semiconductor body, thereby dividing said semiconductor body into divided areas separated by said trench;
(c) forming a thermal oxide film on the sidewall and bottom of said trench in said semiconductor layer;
(d) forming a deposition film of insulating material over said thermal oxide film so as to serve as a gate insulating film together with said underlying thermal oxide film;
(e) after said steps (c) and (d), introducing impurities of a second conductivity type from said first major surface of said divided areas into said semiconductor layer, so as to form a channel forming region of said second conductivity type in each of said divided areas; and
(f) after said steps (c) and (d), introducing impurities of the first conductivity type from said first major surface of said divided areas into said semiconductor layer, so as to form, in each of said divided areas, a source region of said first conductivity type which is exposed to said first major surface and forms a PN junction with said channel forming region. - View Dependent Claims (23)
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Specification