Auto-biasing circuit for current mirrors

• US 6,169,456 B1
• Filed: 01/06/1999
• Issued: 01/02/2001
• Est. Priority Date: 01/06/1999
• Status: Expired due to Term

• Current Assignee: STMicroelectronics NV
• Original Assignee: STMicroelectronics NV
• Inventors: Pauls, Gregory W.
• Primary Examiner(s): Shingleton, Michael B
• Application Number:
  US09/227,283
• Time in Patent Office: 727 Days
• Field of Search: 330/288, 330/296, 330/311, 330/310, 323/315, 323/316
• US Class Current: 330/288
• CPC Class Codes: G05F 3/262 using field-effect transistors only
• CPC Class Codes: H03F 3/345 with field-effect devices H03F3/347 takes precedence

Abstract

In accordance with the present invention, an auto-biased cascode current circuit capable of improved range in headroom is disclosed. In one embodiment, the current circuit includes a current mirror and a bias circuit, where the current mirror contains a reference leg and an output leg. A reference current flows within the reference leg. Included in the output leg is an output terminal, a first output transistor and a second output transistor. The output terminal operates at an output potential. The bias circuit regulates the reference leg of the current mirror such that the output potential is substantially equal to a drain-to-source saturation voltage of the first output transistor plus a drain-to-source saturation voltage of the second output transistor plus a predetermined overdrive voltage. The predetermined overdrive voltage is a design parameter which is less than a threshold voltage. Even as the reference current changes, the bias circuit regulates the reference leg so that the reference current may change significantly while the bias circuit still maintains a proper output potential. In another embodiment, a method for auto-biasing a cascode current circuit is disclosed. The method detects at least one voltage potential from the reference leg and uses this information generate a cascode potential to bias the reference leg.

Claims

1. An auto-biased cascode current circuit, comprising:

a current mirror having a reference leg and an output leg, wherein a reference current flows within the reference leg and wherein the output leg includes;

a first output transistor having a first drain-to-source saturation voltage and a threshold voltage;

a second output transistor, which operates as a cascode transistor, having a second drain-to-source saturation voltage; and

an output terminal having an output potential; and

a bias circuit for biasing the reference leg of the current mirror, wherein;

the output potential is substantially equal to the first drain-to-source saturation voltage plus the second drain-to-source saturation voltage plus a predetermined overdrive voltage,

the predetermined overdrive voltage is less than the threshold voltage, and

the bias circuit is responsive to changes in the reference current;

wherein the reference leg includes;

a first reference transistor having;

a first source terminal,

a first drain terminal, and

a first gate terminal; and

a second reference transistor having;

a second source terminal,

a second drain terminal, and

a second gate terminal;

wherein the bias circuit includes;

a first bias transistor having;

a fifth source terminal,

a fifth drain terminal, and

a fifth gate terminal;

a second bias transistor having;

a sixth source terminal,

a sixth drain terminal, and

a sixth gate terminal;

a third bias transistor having;

a seventh source terminal,

a seventh drain terminal, and

a seventh gate terminal; and

a fourth bias transistor having;

a eighth source terminal,

a eighth drain terminal, and

a eighth gate terminal

the fifth gate terminal is connected to the second drain terminal and the first gate terminal,

the fifth source terminal is connected to the first drain terminal and the second source terminal,

the eighth gate terminal is connected to the eighth drain terminal and the second gate terminal.

2. The auto-biased cascode current circuit of claim 1, wherein:

the reference current varies by at least two orders of magnitude.

3. The auto-biased cascade current circuit of claim 1, wherein:

the bias circuit contains at most four transistors.

4. The auto-biased cascode current circuit of claim 1, wherein:

the second source terminal is coupled to the first drain terminal, and

the second drain terminal is coupled to the first gate terminal.

5. The auto-biased cascode current circuit of claim 1, wherein:

the bias circuit generates a cascode potential on the second gate terminal which is a function of a potential difference between at least one of;

the second drain terminal and the second source terminal, and

the second drain terminal and the first gate terminal.

6. The auto-biased cascode current circuit of claim 5, wherein:

the cascode potential affects the potential difference.

7. The auto-biased cascode current circuit of claim 1, wherein:

the first output transistor includes;

a third source terminal,

a third drain terminal, and

a third gate terminal; and

the second output transistor includes;

a fourth source terminal,

a fourth drain terminal, and

a fourth gate terminal.

8. The auto-biased cascode current circuit of claim 7, wherein:

the fourth gate terminal is coupled to the second gate terminal,

the first gate terminal is coupled to the third gate terminal, and

the first source terminal is coupled to the third source terminal.

9. The auto-biased cascode current circuit of claim 1, wherein:

the bias circuit regulates the first drain potential such that the first drain potential is substantially equal to a third drain-to-source saturation voltage of the first reference transistor plus the predetermined overdrive voltage.

10. The auto-biased cascode current circuit of claim 1, wherein:

the bias circuit generates a cascode potential on the second gate terminal which is a function of at least one of;

a second gate potential,

a second drain potential,

a second source potential,

a first drain potential, and

a first gate potential.

11. The auto-biased cascode current circuit of claim 1, further comprising a plurality of output legs each biased by the single bias circuit.

12. The auto-biased cascode current circuit of claim 1, further comprising an input terminal coupled to a gate of the first output transistor.

13. An auto-biased cascode current circuit, comprising:

a first reference transistor which includes;

a first source terminal,

a first drain terminal, and

a first gate terminal;

a second reference transistor which includes;

a second source terminal which is coupled to the first drain terminal,

a second drain terminal which is coupled to the first gate terminal, and

a second gate terminal; and

a reference signal which passes through the first and second reference transistors;

a bias circuit for supplying a cascode signal to the second gate terminal, wherein;

the cascode signal is substantially equal to a drain-to-source saturation voltage of the first reference transistor, and

the cascode signal changes as the reference signal changes,

 

wherein the bias circuit includes;

a first bias transistor having;

a fifth source terminal,

a fifth drain terminal, and

a fifth gate terminal;

a second bias transistor having;

a sixth source terminal,

a sixth drain terminal, and

a sixth gate terminal;

a third bias transistor having;

a seventh source terminal,

a seventh drain terminal, and

a seventh gate terminal; and

a fourth bias transistor having;

a eighth source terminal,

a eighth drain terminal, and

a eighth gate terminal;

the fifth gate terminal is connected to the second drain terminal and the first gate terminal,

a fifth source terminal is connected to the first drain terminal and the second source terminal,

the eighth gate terminal is connected to the eighth drain terminal and the second gate terminal.

14. The auto-biased cascode current circuit of claim 13, wherein:

the reference current signal by at least two orders of magnitude.

15. The auto-biased cascode current circuit of claim 13, wherein:

the bias circuit contains at most four transistors.

16. The auto-biased cascode current circuit of claim 13, wherein:

the cascode signal is a function of a potential difference between at least one of;

the second drain terminal and the second source terminal, and

the second drain terminal and the first gate terminal.

17. The auto-biased cascode current circuit of claim 16, wherein:

the cascode signal affects the potential difference.

18. The auto-biased cascode current circuit of claim 13, wherein:

the cascode signal is a function of at least one of;

a second gate potential,

a second drain potential,

a second source potential,

a first drain potential, and

a first gate potential.