Method for maintaining the memory content of non-volatile memory cells

• US 6,169,691 B1
• Filed: 09/15/1999
• Issued: 01/02/2001
• Est. Priority Date: 09/15/1998
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Pasotti, Marco, Lhermet, Frank, Rolandi, Pier Luigi
• Primary Examiner(s): Hoang, Huan
• Application Number:
  US09/397,387
• Time in Patent Office: 475 Days
• Field of Search: 365/185.25, 365/185.2, 365/185.24, 365/222
• US Class Current: 365/185.25
• CPC Class Codes: G11C 11/5621 using charge storage in a floating gate
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3431 Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step

Abstract

A method for restoring the charge lost from memory cells, such as to restore the original voltage levels, within a time equivalent to the retention time. The condition of the memory cell is determined, for example, when the memory is switched on, or based on the time elapsed since the previous programming/restoration, or based on the difference between the present threshold voltage of the reference cells and the original threshold voltage of the (suitably stored) reference cells, or when predetermined operating conditions occur. This makes it possible to prolong the life of nonvolatile memories, in particular of multilevel type, wherein the retention time decreases as the number of levels (bits/cell) is increased.

Claims

1. A method for maintaining the memory content of memory cells of a nonvolatile memory, the memory cells being subjected to long-term charge losses after a programming step wherein said memory cells have been programmed to predetermined threshold voltage values, comprising:

storing data about the programmed memory cells at the time the memory cells are programmed or restored;

reading the stored data to determine whether said memory cells require refreshing; and

restoring said predetermined threshold voltage values when refreshing is required.

2. The method of claim 1 wherein said storing data comprises storing the date the memory cells have been last programmed or restored and checking comprises calculating the time elapsed between the date of programming and the current date, and checking whether said elapsed time is greater than a predetermined value.

3. The method of claim 2 wherein said calculating the elapsed time comprises:

reading the stored date;

acquiring the current date; and

calculating the difference between said current date and the stored date.

4. The method of claim 1 wherein storing data comprises storing predetermined threshold voltage values in memory locations and checking comprises determining the difference between present threshold voltage values and the stored threshold voltage values, and checking whether said difference exceeds a predetermined value.

5. The method of claim 4 wherein said determining comprises:

reading said predetermined threshold voltage from said memory locations;

reading said present threshold voltage values of said memory cells; and

calculating the difference between said predetermined threshold voltage values and said present threshold voltage values.

6. The method of claim 5, for a memory array comprising data cells and reference cells, wherein reading said present threshold values comprises reading said reference cells.

7. The method of claim 6 wherein said memory locations comprise memory cells of said memory array.

8. The method of claim 5 wherein said memory cells have a first data retention time, and said memory locations have a second data retention time that is greater than said first time.

9. The method of claim 8 wherein said memory locations belong to a ROM memory.

10. The method of claim 1 wherein restoring said predetermined threshold voltage values comprises:

determining a present threshold voltage value of one cell of said memory cells;

acquiring a predetermined threshold value for said one cell;

calculating a first number of programming pulses with regularly increasing amplitude, as necessary to bring said present threshold value to said predetermined threshold value; and

applying a second number of pulses correlated to the first number of pulses.

11. A method for maintaining the content of a nonvolatile memory cell that is subject to long-term charge losses, the method comprising:

storing predetermined reference data regarding the non-volatile memory cell at the time the non-volatile memory cell is programmed or refreshed to a predetermined value,

determining the current status of the memory cell content;

comparing the current status of the memory cell content to the predetermined reference data; and

restoring the memory cell voltage to the predetermined value.

12. The method of claim 11 wherein the predetermined data reference is the date of programming the memory cell content, the current status is the date of determining the current status, and comparing the status of the memory cell content comprises reading the predetermined reference data and determining if the difference between the date of programming and the current date is within a predetermined value.

13. The method of claim 11 wherein the predetermined reference data is a predetermined memory cell threshold voltage level, the current status is the memory cell threshold voltage level at the time of determining the current status, and comparing the current status of the memory cell content comprises reading the predetermined memory cell threshold voltage level and determining if the difference between the predetermined memory cell threshold voltage level and the current memory cell threshold voltage level is within a predetermined value.

14. The method of claim 11 wherein the predetermined reference data is a predetermined operating condition of the memory cell, the current status is the operating condition of the memory cell at the time of determining the current status, and comparing the current status of the memory cell content comprises reading the predetermined operating condition of the memory cell and determining if the difference between the predetermined operating condition of the memory cell and the current operating condition of the memory cell is within a predetermined value.

15. The method of claim 11, wherein storing the predetermined reference data comprises storing predetermined reference data in a memory location having a data retention time greater than the retention time of the memory cell.

16. The method of claim 15 wherein the memory location of storing the predetermined reference data comprises a ROM.

17. The method of claim 15 wherein storing the predetermined reference data comprises storing the current status in digital format in a data memory cell.

18. The method of claim 11 wherein restoring the memory cell threshold voltage to a predetermined value comprises:

bringing the memory cell into an equilibrium condition;

determining a present threshold voltage level of the memory cell;

calculating a number of voltage pulses to be applied to the memory cell to increase the threshold voltage level from the present threshold voltage level to the predetermined value; and

applying voltage pulses to a gate terminal of the memory cell.

19. The method of claim 18 wherein applying voltage pulses comprises applying a number of voltage pulses that is at least one less voltage pulse than the calculated number of voltage pulses.

20. The method of claim 18 wherein restoring the memory cell threshold voltage further comprises determining the memory cell threshold voltage after the application of voltage pulses to the gate of the memory cell;

calculating the number of additional voltage pulses needed to raise the memory cell threshold voltage from the present threshold voltage to the predetermined value; and

applying voltage pulses to the gate of the memory cell in a number that is at least one less than the calculated number of voltage pulses.