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Subbase programmable control system

  • US 6,169,937 B1
  • Filed: 04/14/1998
  • Issued: 01/02/2001
  • Est. Priority Date: 04/14/1998
  • Status: Expired due to Term
First Claim
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1. A control unit for providing a control signal suitable for controlling any one of a plurality of different operating systems requiring a different control algorithm, each operating system to receive a control signal generated by operation of the control unit by processing of one of a plurality of data sets comprising at least one of instructions and data parameters recorded within and processed by the control unit and assigned to said operating system, said control unit comprising:

  • a) a base for supporting a controller, said base having a preselected mechanical attachment structure, a first connector half having a plurality of first conductor halves, and a first memory unit recording a single one of a plurality of available digital values and in electrical connection with the first conductor halves, each digital value having associated with it a predetermined one of the instruction sets; and

    b) a controller having a second connector half for mating with the first connector half and having a plurality of second conductor halves forming electrical connection with the first conductor halves when the connector halves are mated, and a housing for mating with the base'"'"'s mechanical attachment structure and when so mated being held by the base with the second connector half mated with the first connector half, said controller further including i) a second memory unit in which is recorded each of the data sets, ii) a processor having an data port and processing data sets provided in an data signal from the memory unit, and iii) a selector unit connected to the first memory unit through the mated connector halves and receiving therefrom the digital value recorded in the first memory unit, and connected to the second memory unit to receive therefrom a memory signal encoding the instructions in the instruction sets, and providing to the processor'"'"'s data port a data signal encoding the data in the data set associated with the digital value received from the first memory unit.

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