Method for determining the damage potential of the different types of wafer defects

• US 6,169,960 B1
• Filed: 06/27/1997
• Issued: 01/02/2001
• Est. Priority Date: 06/27/1997
• Status: Expired due to Fees

• Current Assignee: Advanced Micro Devices, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Ehrichs, Edward E.
• Primary Examiner(s): SHAH, KAMINI S
• Application Number:
  US08/884,524
• Time in Patent Office: 1,285 Days
• Field of Search: 702/35, 702/36, 364/468.17, 364/468.28, 356/237.1, 382/149, 324/763, 324/765, 395/500.2, 395/500.6, 257/503, 257/537
• US Class Current: 702/36
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Abstract

A method is presented for devising a model to determine the damage potential of wafer defects. The model takes into account both the defects'"'"' type and size. Wafer defects are the most major cause of depressed yields in semiconductor manufacturing. The wafers are first scanned to detect and identify the defects. There are several available tools that can detect and/or categorize the defects by type and size. A model is then formed to predict the probability (single probability) that a single defect on a die will not cause it to be nonfunctional. This model must depend on the size of the defect and an additional undetermined parameter which is specific to the type of the defect. Assuming that the effect of different defects is independent, the probability that a die will be functional when having multiple defects is then simply given by the product of all the single probabilities. At the end of the manufacturing process, the wafers can be electrically tested to determine whether the die are functional or not. An error function can then be formed by adding together the square of: for functional die, one minus the predicted probability; for nonfunctional die, the predicted probability minus zero. A good model should predict close to one for functional die and close to zero for nonfunctional die. By numerically minimizing this error function, the undetermined parameters can be computed. These parameters can then be used to predict the damage potential of defects for future wafers.

Claims

1. A method for determining damage potentials of various wafer defects in semiconductor manufacturing, comprising:

providing a semiconductor wafer comprising a plurality of die sites;

producing a defect data base from a plurality of defects on said wafer, wherein said data base comprises a location, a size, and a type of each of said defects;

testing each of said die to produce a wafer map indicating whether each of said die is functional or nonfunctional;

proposing a die model for predicting a die probability that one of said die is functional, wherein said die probability is a function of said location, said size, and said type of said defects, wherein said proposing said die model to predict said die probability that one of said die is functional comprises;

proposing a single model for predicting a plurality of single probabilities that one of said die will be functional when only a single defect exists on said die; and

computing said die probability by forming a product of said single probabilities corresponding to all defects on said die; and

minimizing an error function by modifying said proposed die model, wherein said error function comprises a difference between said wafer map and said proposed die model.

2. The method as recited in claim 1, wherein the step of producing said defect data base comprises optical scanning of said wafer.

3. The method as recited in claim 2, wherein the step of optical scanning of said wafer is performed with a laser scanning tool.

4. The method as recited in claim 2, wherein the step of optical scanning of said wafer is performed with an image comparison tool.

5. The method as recited in claim 1, wherein the step of computing said die probability further comprises multiplying said single probabilities with an additional probability, wherein said additional probability is representative of any additional factors that may cause a die to be nonfunctional.

6. The method as recited in claim 1, wherein the step of proposing said single model comprises an exponential function, wherein an exponent of said exponential function comprises the negative of the product of said size of one of said defects and an undetermined parameter corresponding to said type of said defect.

7. The method as recited in claim 1, wherein said the step of proposing said single model comprises an exponential function, wherein an exponent of said exponential function comprises the negative of the product of the square of said size of one of said defects and an undetermined parameter corresponding to said type of said defect.

8. The method as recited in claim 1, wherein the step of testing each of said die comprises electrical testing, wherein said electrical testing sorts the die into functional die and nonfunctional die.

9. The method as recited in claim 1, wherein said error function comprises the sum of:

for all said functional die, the square of 1 minus said die probability;

for all said nonfunctional die, the square of said die probability minus 0.

10. The method as recited in claim 1, wherein the step of modifying said proposed die model comprises changing the value of a plurality of undetermined free parameters of said die model.

11. The method as recited in claim 10, wherein said undetermined parameters are used to characterize said damage potential of said defects and wherein each of said undetermined parameters corresponds to one of said types of said defects.

12. The method as recited in claim 1, wherein the step of minimizing said error function comprises numerically/computationally minimizing said error function.

13. A memory medium comprising:

a defect data base comprising a location, a type, and a size of a plurality of defects of a semiconductor wafer, wherein said wafer comprises a plurality of die sites;

a wafer map obtained by testing said die, wherein said wafer map indicates whether each of said die is functional or nonfunctional;

a die model for predicting a die probability that one of said die is functional, wherein said die probability is a function of said location, said type, and said size of said defects, wherein said die model comprises;

a single model for predicting a plurality of single probabilities that one of said die will be functional when only a single defect exists on said die; and

a product of said single probabilities corresponding to all defects on said die;

an error function comprising a difference between said wafer map and said proposed die model.

14. The memory medium of claim 13, wherein said single probability is a function of said size of said defect and an undetermined parameter, wherein said undetermined parameter corresponds to said type of said defect.

15. The memory medium of claim 13, wherein said product further comprises an additional probability, wherein said additional probability is representative of any additional factors that may cause a die to be nonfunctional.

16. The memory medium of claim 13, wherein said single model comprises an exponential function, wherein an exponent of said exponential function comprises the negative of the product of said size of one of said defects and one of said undetermined parameters corresponding to said type of said defect.

17. The memory medium of claim 13, wherein said single model comprises an exponential function, wherein an exponent of said exponential function comprises the negative of the product of the square of said size of one of said defects and one of said undetermined parameter corresponding to said type of said defect.

18. The memory medium of claim 13, wherein said wafer map is obtained by electrical testing of said die.

19. The memory medium of claim 13, wherein said error function comprises the sum of:

for all said functional die, the square of one minus said die probability;

for all said nonfunctional die, the square of said die probability minus zero.

20. The memory medium of claim 13, wherein said error function is minimized numerically/computationally.

21. The memory medium of claim 14, wherein said location of each of said defects comprises a die on which each of said defects is located.

22. The memory medium of claim 14, wherein said location of each of said defects comprises a fabrication level on which each of said defects is located.