Method for executing instructions that operate on different data types stored in the same single logical register file

• US 6,170,997 B1
• Filed: 07/22/1997
• Issued: 01/09/2001
• Est. Priority Date: 12/19/1995
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Eitan, Benny, Glew, Andrew F., Mittal, Millind, Mennemeier, Larry M., Kowashi, Eiichi, Peleg, Alexander D., Dulong, Carole, Bistry, David, Lin, Derrik, Vakkalagadda, Romamohan R.
• Primary Examiner(s): Lall, Parshotam S.
• Assistant Examiner(s): TREAT, WILLIAM M
• Application Number:
  US08/898,720
• Time in Patent Office: 1,267 Days
• Field of Search: 395/800.23, 395/384, 395/566, 395/567, 395/569, 395/563, 395/800.01, 395/385, 395/677, 395/678, 395/800.34, 395/570, 395/591, 395/393, 711/221
• US Class Current: 712/217
• CPC Class Codes: G06F 9/30036 Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
• CPC Class Codes: G06F 9/30038 using a mask
• CPC Class Codes: G06F 9/30101 Special purpose registers
• CPC Class Codes: G06F 9/30105 Register structure
• CPC Class Codes: G06F 9/30109 having multiple operands in a single register
• CPC Class Codes: G06F 9/30112 comprising data of variable length
• CPC Class Codes: G06F 9/30134 Register stacks; shift registers
• CPC Class Codes: G06F 9/3017 Runtime instruction translation, e.g. macros
• CPC Class Codes: G06F 9/30189 according to execution mode, e.g. mode flag
• CPC Class Codes: G06F 9/384 Register renaming
• CPC Class Codes: G06F 9/45533 Hypervisors; Virtual machine monitors
• CPC Class Codes: G06F 9/462 with multiple register sets

Abstract

A method for executing different sets of instructions that cause a processor to perform different data type operations in a manner that is invisible to various operating system techniques, that promotes good programming practices, and that is invisible to existing software conventions. According to one aspect of the invention, a data processing apparatus executes a first set of instructions of a first instruction type on what at least logically appears to software as a single logical register file. While the data processing apparatus is executing the first set of instructions, the single logical register file appears to be operated as a flat register file. In addition, the data processing apparatus executes a first instruction of a second instruction type using the logical register file. However, while the data processing apparatus is executing the first instruction, the logical register file appears to be operated as a stack referenced register file. Furthermore, the data processing apparatus alters all tags in a set of tags corresponding to the single logical register file to a non-empty state sometime between starting the execution of the first set of instructions and completing the execution of the first instruction. The tags identifying whether registers in the single logical register file are empty or non-empty.

Claims

1. In a data processing apparatus, a method for executing instructions comprising the steps of:

executing a first set of instructions of a packed instruction type on the contents of a first single logical register file, wherein said first single logical register file is operated as a flat register file while executing said first set of instructions; and

executing a first instruction of a scalar instruction type also on the contents of said first single logical register file, wherein said first single logical register file is operated as a stack referenced register file while executing said first instruction.

2. The method of claim 1, wherein said packed and scalar instruction types are respectively packed integer instructions and scalar floating point instructions.

3. The method of claim 1 further comprising the steps of:

altering a top of stack indication to an initialization value sometime between starting said step of executing said first set of instructions and completing said step of executing said first instruction of said scalar instruction type, wherein said top of stack indication identifies one register in said first single logical register file as a current top of stack register.

4. The method of claim 2 further comprising the step of:

altering a plurality of tags corresponding to said first single logical register file to a non-empty state sometime between starting said step of executing said first set of instructions and completing said step of executing said first instruction of said scalar instruction type, and wherein each tag in said plurality of tags corresponds to a different register in said first single logical register file and identifies whether said register is empty or non-empty.

5. The method of claim 2 further comprising the step of:

writing, in a sign and exponent field of each register in said first single logical register file that is written to during the step of executing said first set of instructions, a value indicating either not a number or infinity, sometime between starting said step of executing said first set of instructions and starting said step of executing said first instruction of said scalar instruction type.

6. The method of claim 2 further comprising the step of:

executing a second set of instructions of a packed floating point type on the contents of a second single logical register file.

7. The method of claim 6 further comprising the steps of:

altering a top of stack indication to an initialization value sometime between starting said step of executing said first set of instructions and completing said step of executing said first instruction of said scalar instruction type, wherein said top of stack indication identifies one register in said first single logical register file as a current top of stack register.

8. The method of claim 6 further comprising the step of:

altering a plurality of tags corresponding to said first single logical register file to a non-empty state sometime between starting said step of executing said first set of instructions and completing said step of executing said first instruction of said scalar instruction type, and wherein each tag in said plurality of tags corresponds to a different register in said first single logical register file and identifies whether said register is empty or non-empty.

9. The method of claim 6 further comprising the step of:

writing, in a sign and exponent field of each register in said first single logical register file that is written to during the step of executing said first set of instructions, a value indicating either not a number or infinity, sometime between starting said step of executing said first set of instructions and starting said step of executing said first instruction of said scalar instruction type.

10. In a data processing apparatus, a method for executing instructions comprising the steps of:

executing a set of packed integer data instructions and a set of scalar floating point instructions on the contents of a first single logical register file that is at least partially aliased, wherein a first of said floating point instructions is executed first;

executing a set of packed floating point data instructions on the contents of a second single logical register file; and

altering at least those of a plurality of tags corresponding to aliased registers in said first single logical register file to a non-empty state sometime between attempting to execute said set of packed integer data instructions and completing execution of the first of said set of scalar floating point instructions, and wherein said plurality of tags identify whether registers in said single logical resister file are empty or non-empty.

11. The method of claim 10, wherein said step of executing said set of packed integer data instructions and said set of scalar floating point instructions includes the steps of:

executing said set of packed integer data instructions on said first single logical register file as a fixed register file; and

executing said set of scalar floating point instructions on said single logical register file as a stack referenced register file.

12. The method of claim 11 further comprising the steps of:

altering a top of stack indication to an initialization value sometime between attempting to execute said set of packed integer data instructions and completing execution of the first of said set of scalar floating point instructions, wherein said top of stack indication identifies one register in said first single logical register file as a current top of stack register.

13. The method of claim 10 further comprising the step of:

writing, in a sign and exponent field of each register in said first single logical register file that is written to during the execution said set of packed integer data instructions, a value indicating either not a number or infinity, sometime between attempting to execute said set of packed integer data instructions and completing execution of the first of said set of scalar floating point instructions.

14. In a data processing apparatus, a method for executing instructions comprising the steps of:

executing a first set of instructions of a first instruction type on the contents of a first single logical register file, wherein said first single logical register file is operated as a flat register file while executing said first set of instructions;

executing a first instruction of a second instruction type also on the contents of said first single logical register file, wherein said first single logical register file is operated as a stack referenced register file while executing said first instruction; and

altering a top of stack indication to an initialization value sometime between starting said step of executing said first set of instructions and completing said step of executing said first instruction of said second instruction type, wherein said top of stack indication identifies one register in said first single logical register file as a current top of stack register.

15. The method of claim 14 further comprising the step of:

altering a plurality of tags corresponding to said first single logical register file to a non-empty state sometime between starting said step of executing said first set of instructions and completing said step of executing said first instruction of said second instruction type, and wherein each tag in said plurality of tags corresponds to a different register in said first single logical register file and identifies whether said register is empty or non-empty.

16. The method of claim 15, wherein said step of altering is performed in response to either attempting to execute said first instruction or executing the first of said first set of instructions.

17. The method of claim 15, wherein said step of altering is performed in between said step of executing said first set of instructions and executing said first instruction of said second instruction type.

18. The method of claim 15, wherein said step of altering is performed in response to attempting to execute the first of said first set of instructions.

19. The method of claim 15, wherein said first and second instruction types are respectively packed instructions and scalar instructions.

20. The method of claim 15, wherein said first and second instruction types are respectively packed integer instructions and scalar floating point instructions.

21. The method of claim 20 further comprising the step of:

executing a second set of instructions of a packed floating point type on the contents of a second single logical register file.

22. The method of claim 20, wherein said first and second instruction types are respectively packed instructions and scalar instructions.

23. The method of claim 20, wherein said first and second instruction types are respectively packed integer instructions and scalar floating point instructions.

24. The method of claim 23 further comprising the step of:

executing a second set of instructions of a packed floating point type on the contents of a second single logical register file.

25. The method of claim 15 further comprising the step of:

writing, in a sign and exponent field of each register in said first single logical register file that is written to during the step of executing said first set of instructions, a value indicating either not a number or infinity, sometime between starting said step of executing said first set of instructions and starting said step of executing said first instruction of said second instruction type.