Frame synchronization method and apparatus for use in digital communication system utilizing OFDM method

• US 6,172,993 B1
• Filed: 12/01/1997
• Issued: 01/09/2001
• Est. Priority Date: 12/28/1996
• Status: Expired due to Term

• Current Assignee: Wi-LAN Inc.
• Original Assignee: Daewoo Electronics Company Limited (Dayou Holdings Co.,Ltd.)
• Inventors: Kim, Young-Sang, Langinieux, Francois
• Primary Examiner(s): Nguyen, Chau
• Assistant Examiner(s): LEE, CHI HO A
• Application Number:
  US08/982,268
• Time in Patent Office: 1,135 Days
• Field of Search: 370/509, 370/510, 370/511, 370/512, 370/516, 370/491, 370/492, 375/232, 375/235, 375/354, 375/366, 375/364, 348/425.4, 348/500, 348/501, 348/507, 348/513
• US Class Current: 370/516
• CPC Class Codes: H04L 27/2656 Frame synchronisation, e.g. packet synchronisation, time division duplex [TDD] switching point detection or subframe synchronisation
• CPC Class Codes: H04L 27/2675 Pilot or known symbols

Abstract

A frame synchronization method and apparatus for use in a digital communication system utilizing OFDM method are disclosed. The frame synchronization apparatus comprises a phase calculator for calculating phase values of TPS pilots within a symbol according to in-phase and quadrature-phase channel signals received from a transmitting side; a D-BPSK demodulator for performing D-BPSK demodulation for the phase values of TPS pilots supplied from the phase calculator and outputting the TPS pilots within the demodulated symbol; a control signal generator for comparing the demodulated TPS pilots with each other and outputting a control signal according to the compared result; and frame synchronization unit for confirming a sync word position according to the control signal supplied from the control signal generator and outputting a frame sync signal. Hence, frame synchronization can be achieved by using the synchronization word inverted at each frame in one TPS block without the need to increase the size of hardware.

Claims

1. A frame synchronization method for use in a digital communication system utilizing OFDM method, comprising the steps of:

a) calculating phase values of TPS pilots within a symbol according to in-phase and quadrature-phase channel signals received from a transmitting side;

b) calculating phase differences from the phase values of the TPS pilots of previous symbol and the respective phase values of the TPS pilots of current symbol calculated in said step a);

c) performing D-BPSK demodulation for the phase difference obtained in said step b);

d) determining whether all the demodulated TPS pilots in said step c) are identical to each other;

e) determining whether current position corresponds to a sync word position, when all the demodulated TPS pilots are determined identical to each other, in said step d);

and

f) counting symbols, when current position corresponds to the sync word position in said step e), and generating a frame sync signal according to the counted value.

2. A frame synchronization apparatus for use in a digital communication system utilizing OFDM method, comprising:

phase calculation means for calculating phase values of TPS pilots within a symbol according to in-phase and quadrature-phase channel signals received from a transmitting side;

D-BPSK demodulating means for performing D-BPSK demodulation for the phase values of the TPS pilots supplied from said phase calculation means and outputting the TPS pilots within the demodulated symbol;

control signal generating means for comparing the demodulated TPS pilots with each other and outputting a control signal according to the compared result; and

frame synchronization means for confirming a sync word position according to the control signal supplied from said control signal generating means and outputting a frame sync signal.

3. The frame synchronization apparatus of claim 2, wherein said phase calculating means is implemented by a memory in which the phase values of the TPS pilots corresponding to the in-phase and quadrature-phase channel signals are stored in the form of a look-up table.

4. The frame synchronization apparatus of claim 2, wherein said D-BPSK demodulating means comprises;

a phase storage unit for storing the phase values of the TPS pilots outputted from said phase calculating means;

a subtracter for subtracting the phase values of the TPS pilots of previous symbol from the respective phase values of the TPS pilots of current symbol supplied from said phase storage unit and outputting phase differences; and

a D-BPSK decoder for performing D-BPSK decoding for the phase difference supplied from said subtracter and outputting a decoded TPS pilot.

5. The frame synchronization apparatus of claim 4, wherein said phase storage unit is implemented by a shift register for storing number of phases being one more than corresponding number of pilots within one symbol.

6. The frame synchronization apparatus of claim 2, wherein said control signal generating means comprises:

a pilot storage unit for storing the decoded TPS pilots outputted from said D-BPSK demodulating means; and

a pilot comparator for comparing the decoded TPS pilots with each other to determine whether all the decoded TPS pilots are identical to each other and generating a control signal according to the compared result.

7. The frame synchronization apparatus of claim 6, wherein the control signal outputted from said pilot comparator resets said frame synchronization means when all the decoded TPS pilots are not identical to each other.

8. The frame synchronization apparatus of claim 6, wherein said pilot storage unit is implemented by a shift register for storing number of pilots within one symbol.

9. The frame synchronization apparatus of claim 2, wherein said frame synchronization means comprises:

a TPS pilot storage unit for storing the TPS pilot of the corresponding symbol outputted from said pilot comparing means;

a TPS pilot comparator for comparing the TPS pilots of previous frame with the respective TPS pilots of current frame, confirming the sync word position according to the compared result, and outputting a control signal when the current position corresponds to the sync word position; and

counting means for counting symbol clocks according the control signal outputted from said TPS pilot comparator and outputting a frame sync signal according to the counted value.

10. The frame synchronization apparatus of claim 9, wherein said TPS pilot storage unit is implemented by a shift register for storing number of TPS pilots being one more than corresponding number of symbols within one frame.

11. The frame synchronization apparatus of claim 9, wherein said TPS pilot comparator is implemented by an exclusive OR gate.

12. The frame synchronization apparatus of claim 9, wherein said counting means is implemented by a 4-bit counter.