Method and apparatus for a wafer level system

• US 6,175,124 B1
• Filed: 06/30/1998
• Issued: 01/16/2001
• Est. Priority Date: 06/30/1998
• Status: Expired due to Term

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Rittenhouse, Scott J., Cole, Richard K., Yakura, James P., Tollerud, Brad S., Von Thun, Matthew S.
• Primary Examiner(s): HARDY, DAVID B
• Application Number:
  US09/108,092
• Time in Patent Office: 931 Days
• Field of Search: 257/48, 257/620, 257/207, 257/531, 257/679, 361/821, 235/487
• US Class Current: 257/48
• CPC Class Codes: H01L 22/32 Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors arrangements for conducting electric current to or from the solid state body in operation H01L23/48
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An improved wafer scale integrated circuit is described which includes non-contact power and data transmission coupling. Wireless power and data coupling reduces the mechanical stresses and strains on the wafer, and makes better use of the wafer area. An additional benefit comes from allowing better heat transfer management. In one embodiment, power is provided by inductive coupling. Data flow into and out of the wafer is accomplished optically, using optical detectors to receive and light emitting diodes to transmit. Multiple devices are integrated onto the semiconductor wafer. Systems may be incorporated using the traditional die sites. Connections between systems are made in the space between die sites.

Claims

1. An integrated circuit comprising:

a semiconductor substrate;

an electronic device formed on the semiconductor substrate; and

power means formed on the semiconductor substrate and electronically connected to the

electronic device, wherein the power means receives power through inductive coupling for use by the electronic device.

2. The integrated circuit of claim 1 further comprising wireless data transfer means for receiving and transmitting data to and from the electronic device.

4. The integrated circuit of claim 1, wherein the semiconductor substrate is a semiconductor wafer.

5. The integrated circuit of claim 1, wherein the wafer is a silicon wafer.

6. The integrated circuit of claim 1, wherein the electronic device is a memory element.

7. The integrated circuit of claim 1, wherein the electronic device is a logic element.

8. The integrated circuit of claim 1 wherein device has a secondary transformer which receives inductive power when it is proximate to a first transformer.

3. An integrated circuit comprising:

a semiconductor substrate;

an electronic device formed on the substrate;

power means for receiving power for use by the electronic device, wherein the power means uses inductive coupling to receive power; and

wireless data transfer means for receiving and transmitting data to and from the electronic device, wherein the data transfer means employs optical coupling to receive and transmit data.

9. An integrated circuit comprising:

a semiconductor substrate;

an electronic device formed on the substrate;

power means for receiving power for use by the electronic device, wherein the power means uses inductive coupling to receive power;

wireless data transfer means for receiving and transmitting data to and from the electronic device;

additional electronic devices;

a plurality of scribe lines formed within the semiconductor substrate, wherein the electronic device and the additional electronic devices are segregated using a plurality of scribe lines formed in the semiconductor substrate; and

a plurality of data lines formed within the scribe lines, wherein the plurality of data lines interconnect the electronic device and the additional electronic devices.

10. A wafer scale integrated circuit device comprising:

a wafer;

a plurality of semiconductor devices formed on the wafer; and

wireless power and data interface formed on the wafer and connected to the plurality of semiconductor devices, wherein the wireless power and data interface supplies power to the electronic device and facilitates data transfer to and from the electronic device.

11. The wafer scale integrated circuit device of claim 10, wherein power is delivered to the wireless power and data interface by inductive coupling.

12. The wafer scale integrated circuit device of claim 10, wherein the power is delivered to the wireless power and data interface by an optical beam.

13. The wafer scale integrated circuit device of claim 10, wherein the data is transmitted on the wireless power and data interface optically.

14. The wafer scale integrated circuit device of claim 10, wherein the data is transmitted to the wireless power and data interface by an electron beam.

15. The wafer scale integrated circuit device of claim 10, wherein the data is transmitted from the wireless power and data interface optically.

16. The wafer scale integrated circuit device of claim 10, wherein the data is read from the wireless power and data interface by electron beam scanning of charged nodes formed on the wafer.

17. The wafer scale integrated circuit device of claim 10, wherein the wafer is a semiconductor wafer.

18. The wafer scale integrated circuit device of claim 17, wherein the semiconductor wafer is a silicon wafer.

19. The wafer scale integrated circuit device of claim 10 further comprising:

a plurality of scribe lines, wherein the plurality of scribe lines separates the plurality of semiconductor devices;

a plurality of power lines formed within the plurality of scribe lines, wherein the plurality of power lines provide a connection between the power and data interface and the plurality of semiconductor devices; and

a plurality of data lines formed within the plurality of data lines, wherein the plurality of data lines provide a connection between the power and data interface and the plurality of semiconductor devices.

20. A wafer scale integrated circuit system comprising:

a semiconductor wafer;

a plurality of circuit blocks, wherein the power of circuit blocks contains semiconductor devices;

a plurality of scribe lines separating the plurality of circuit blocks;

interconnect circuitry including signal lines formed in the scribe lines, the interconnect circuitry being used to interconnect the plurality of circuit blocks; and

power means for receiving power from a source located off the semiconductor wafer, wherein power is received through inductive coupling, and wherein the power means has a connection to the interconnect circuitry to provide power to the plurality of circuit blocks.

21. The wafer scale integrated circuit system of claim 20, wherein means for transmitting and receiving data is accomplished through optical coupling.

22. The wafer scale integrated circuit system of claim 20, wherein the semiconductor wafer is a silicon wafer.

23. The wafer scale integrated circuit system of claim 20, wherein the plurality of circuit blocks includes a memory array.

24. The wafer scale integrated circuit device of claim 20, wherein the plurality of circuit blocks includes a logic array.

25. The wafer scale integrated circuit device of claim 20, wherein the power means includes a secondary transformer, which receives inductive power when the secondary transformer is proximate to a primary transformer.

26. A data processing system comprising:

a wafer;

a plurality of electronic devices;

wireless power interface formed on the wafer;

wherein the wireless power interface is connected to the plurality of electronic devices; and

wireless data interface formed on the wafer, wherein the wireless data interface is connected to the plurality of electronic devices.

27. The data processing system of claim 26, wherein the plurality of electronic devices form a communications system.

28. The data processing system of claim 26, wherein the plurality of electronic devices form a computer.

29. The data processing system of claim 26, wherein the power is delivered to the wireless power interface by inductive coupling.

30. The data processing system of claim 26, wherein the power is delivered to the wireless power interface by an optical beam.

31. The data processing system of claim 26, wherein the data is transmitted to wireless data interface optically.

32. The data processing system of claim 26, wherein the data is transmitted to the wireless data interface by an electron beam.

33. The data processing system of claim 26, wherein the data is read from the wireless data interface by electron beam scanning of charged nodes.

34. The data processing system of claim 26, wherein the wafer is a semiconductor wafer.

35. The data processing system of claim 34, wherein the semiconductor wafer is silicon.

37. The method of claim 32, wherein the connecting step comprises:

forming a plurality of scribe lines, wherein the plurality of scribe lines separate the plurality of electronic devices from each other;

forming a plurality of signal lines, wherein the plurality of signal lines includes a first portion of signal lines and a second portion of signal lines;

connecting a first portion of signal lines between the wireless data link and at least one of the plurality of electronic devices; and

connecting a second portion of signal lines between the power reception means and at least one of the plurality of electronic devices.

38. The method of claim 32, wherein the plurality of signal lines includes a third portion of signal lines and further comprising:

interconnecting the plurality of electronic devices using a third portion of the plurality of signal lines.

39. The method of claim 32, wherein power is delivered to the power reception means by inductive coupling.

36. A method of fabricating a wafer scale integrated circuit device comprising:

forming a plurality of electronic devices on a semiconductor wafer;

forming a wireless power reception means the semiconductor wafer;

forming a wireless data link on the semiconductor wafer; and

connecting the wireless power reception means and the wireless data link to at least one of the plurality of electronic devices.

40. The method of claim 36, wherein the power is delivered to the power reception means by an optical beam.

41. The method of claim 36, wherein the data is transmitted to the wireless data link optically.

42. The method of claim 36, wherein the data is transmitted to the wireless data link by an electron beam.

43. The method of claim 36, wherein the data is transmitted from the device optically.

44. The method of claim 36, wherein the wireless data link includes charged nodes and the data is read from the wireless data link by electron beam scanning of charged nodes.

45. The method of claim 36, wherein the wafer is a semiconductor wafer.

46. The method of claim 45, wherein the semiconductor wafer is a silicon wafer.