Method for forming coaxial silicon interconnects

• US 6,175,242 B1
• Filed: 12/20/1999
• Issued: 01/16/2001
• Est. Priority Date: 12/02/1997
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Hembree, David R., Wood, Alan G., Akram, Salman
• Primary Examiner(s): Metjahic, Safet
• Assistant Examiner(s): SUNDARAM, T R
• Application Number:
  US09/467,437
• Time in Patent Office: 393 Days
• Field of Search: 324/755, 324/754, 324/757, 324/758, 324/760, 324/765, 324/158.1
• US Class Current: 324/756.05
• CPC Class Codes: G01R 1/0408 Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets G01R1/067 takes precedence; mass production testing systems G01R31/59; testing of connections G01R31/66; for testing printed circuit boards G01R31/2808
• CPC Class Codes: G01R 31/2886 Features relating to contacting the IC under test, e.g. probe heads; chucks G01R31/2865 takes precedence, test connections, e.g. test sockets, or probes per se, G01R1/04 or G01R1/06

Abstract

An interconnect apparatus for testing bare semiconductor dice comprises raised contact members on a semiconductive substrate. The contact members are covered with an insulation layer and a conductive cap connected by a conductive trace to a testing circuit. The trace is covered with coaxial layers of a silicon containing insulation and a metal for shielding the trace from “cross-talk” and other interference. An apparatus for simultaneous testing of multiple dies on a wafer has thermal expansion characteristics matching those of the semiconductor die or wafer and provides clean signals.

Claims

1. An apparatus for testing a circuit of a semiconductor device, comprising:

a substrate having a surface including a first layer of insulation on a portion of said surface, said substrate having a portion thereof for engaging at least one bond pad of a semiconductor device;

at least one raised contact member positioned on said surface of said substrate for contact with a portion of said at least one bond pad of said semiconductor device;

at least one conductive trace connected to said at least one raised contact member;

a second layer of insulation overlying a portion of said at least one trace; and

a conductive layer overlying a portion of said second layer of insulation and said at least one conductive trace to provide shielding to said at least one conductive trace.

2. The apparatus of claim 1, wherein said second layer of insulation and said conductive layer comprise substantially continuous layers overlying said at least one trace, overlying said substrate located between said substrate and said at least one trace, and overlying non-contact portions of said at least one raised contact member.

3. The apparatus of claim 1, wherein said conductive layer comprises one of aluminum, titanium, tungsten, cobalt, nickel, molybdenum, and copper.

4. The apparatus of claim 1, wherein said second insulative layer comprises silicon dioxide.

5. The apparatus of claim 1, wherein said second insulative layer comprises silicon nitride.

6. The apparatus of claim 1, wherein said substrate comprises a semiconductor material.

7. The apparatus of claim 1, wherein said substrate comprises silicon dioxide material.

8. The apparatus of claim 1, wherein said at least one raised contact member includes a projecting apex and a stop surface located adjacent to said projecting apex.

9. An apparatus for testing a circuit of a semiconductor device, comprising:

a substrate having an insulative surface on at least a portion thereof, said substrate to overlie at least a portion of a surface of a semiconductor device, said surface of said semiconductor device having a plurality of bond pads thereon;

a plurality of raised contact members positioned on said insulative surface on at least a portion of said substrate for contact with at least one bond pad of said plurality of bond pads of said semiconductor device;

a plurality of conductive traces, at least one trace of said plurality of conductive traces connected to at least one raised contact member of said plurality of raised contact members;

a second insulative layer substantially overlying each trace of said plurality of traces; and

a conductive layer overlying said second insulative layer and each said conductive trace of said plurality of traces to provide shielding to each said conductive trace.

10. The apparatus of claim 9, wherein said second insulative layer and said conductive layer comprise continuous layers overlying said plurality of traces, overlying said substrate located between said substrate and said plurality of traces, and overlying non-contact portions of said plurality of raised contact members.

11. The apparatus of claim 9, wherein said conductive layer comprises one of aluminum, titanium, tungsten, cobalt, nickel, molybdenum, and copper.

12. The apparatus of claim 9, wherein said second insulative layer comprises silicon dioxide.

13. The apparatus of claim 9, wherein said second insulative layer comprises silicon nitride.

14. The apparatus of claim 9, wherein said substrate comprises a semiconductor material.

15. The apparatus of claim 9, wherein said substrate comprises silicon dioxide material.

16. The apparatus of claim 9, wherein at least one of said plurality of raised contact members includes a projecting apex and a stop surface located adjacent to said projecting apex.

17. An apparatus for testing a circuit of a semiconductor device, comprising:

a substrate having an insulative surface thereon, said substrate to overlie a portion of a surface of a semiconductor device having a plurality of bond pads thereon;

a plurality of raised contact members positioned on said surface of said substrate to contact with said plurality of bond pads;

a plurality of conductive traces, at least one conductive trace of said plurality of traces connected to at least one contact member of said plurality of raised contact members;

a second insulative layer overlying each trace of said plurality of traces; and

a conductive layer overlying said second insulative layer.

18. The apparatus of claim 17, wherein said second insulative layer and said conductive layer comprise substantially continuous layers overlying said plurality of traces, overlying said substrate located between said substrate and said plurality of traces, and overlying non-contact portions of said plurality of raised contact members.

19. The apparatus of claim 17, wherein said conductive layer comprises one of aluminum, titanium, tungsten, cobalt, nickel, molybdenum, and copper.

20. The apparatus of claim 17, wherein said second insulative layer comprises silicon dioxide.

21. The apparatus of claim 17, wherein said second insulative layer comprises silicon nitride.

22. The apparatus of claim 17, wherein said substrate comprises a semiconductor material.

23. The apparatus of claim 17, wherein said substrate comprises silicon dioxide material.

24. The apparatus of claim 17, wherein substantially each raised contact member of said plurality of raised contact members includes a projecting apex and a stop surface located adjacent to said projecting apex.