Method and system for dynamic duration burn-in

• US 6,175,812 B1
• Filed: 02/26/1998
• Issued: 01/16/2001
• Est. Priority Date: 02/26/1998
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Rogers, Denzil, Boyington, Rick
• Primary Examiner(s): ASSOUAD, PATRICK J
• Application Number:
  US09/031,411
• Time in Patent Office: 1,055 Days
• Field of Search: 324/527, 324/528, 324/760, 702/118, 702/81, 702/87, 716/4
• US Class Current: 702/118
• CPC Class Codes: G01R 31/287 Procedures; Software aspects

Abstract

A computer-implemented method and system for dynamic duration burn-in. A computer system is provided having a processing unit, input device and storage. The storage includes a performance database for tracking burn-in test results of a plurality of ICs. Test criteria is determined against which the burn-in test results will be compared. The plurality of ICs are stressed for a burn-in interval in a stress chamber and the plurality of ICs are tested to determine a failure rate from burn-in. The failure rate is compared to the test criteria and the steps of stressing, testing and comparing are repeated until the failure rate fulfills the test criteria.

Claims

1. A computer-implemented method for dynamic duration burn-in of integrated circuits (IC'"'"'s), comprising:

providing a computer system having a processing unit, input device and storage, wherein the storage includes a performance database for tracking burn-in test results of a plurality of ICs;

determining test criteria against which the burn-in test results will be compared;

stressing the plurality of ICs for a burn-in interval;

testing the plurality of ICs to determine an instantaneous failure rate from burn-in;

comparing the instantaneous failure rate to the test criteria;

repeating the stressing, testing and comparing until the instantaneous failure rate fulfills the test criteria and dynamically stopping the burn-in interval in response thereto.

2. The method according to claim 1, wherein testing further comprises receiving performance data concerning the plurality of ICs for indicating which of the ICs have malfunctioned.

3. The method according to claim 1, wherein testing further comprises writing the performance data to the performance database.

4. The method according to claim 1, wherein testing further comprises calculating a failure rate of the plurality of ICs as a function of the performance data.

5. The method according to claim 1, wherein stressing further comprises adjusting the burn-in interval as a function of the failure rate.

6. The method according to claim 1, wherein stressing further comprises adjusting the burn-in interval as a function of the performance database.

7. The method according to claim 1, wherein stressing further. comprises setting a burn-in interval initially to a core time.

8. A computer program product, comprising:

a computer usable medium having computer readable program code embodied thereon, the computer readable program code, when executed, implementing on the computer a method for dynamic duration burn-in, the method comprising;

determining test criteria against which the burn-in test results will be compared;

stressing the plurality of ICs for a burn-in interval;

testing the plurality of ICs to determine instantaneous failure rate from burn-in;

comparing the failure rate to the test criteria;

repeating the stressing, testing and comparing until the instantaneous failure rate fulfills the test criteria and prematurely terminating the burn-in interval in response thereto.

9. The computer program product according to claim 8, wherein testing further comprises receiving performance data concerning the plurality of ICs for indicating which of the ICs have malfunctioned.

10. The computer program product according to claim 8, wherein testing further comprises writing the performance data to the performance database.

11. The computer program product according to claim 8, wherein testing further comprises calculating a failure rate of the plurality of ICs as a function of the performance data.

12. The computer program product according to claim 8, wherein stressing further comprises adjusting the burn-in interval as a function of the failure rate.

13. The computer program product according to claim 8, wherein stressing further comprises adjusting the burn-in interval as a function of the performance database.

14. The computer program product according to claim 8, wherein stressing further comprises setting a burn-in interval initially to a core time.

15. A dynamic duration burn-in device, comprising:

a computer system having a processing unit, input device and storage, wherein the storage further includes a performance database for tracking burn-in test results of a plurality of ICs and test criteria against which the burn-in test results will be compared;

a stress chamber connected to the computer system and operable for stressing the plurality of ICs for a burn-in interval;

a burn-in test hardware connected to the computer and operable for testing the plurality of ICs to determine a failure rate from burn-in; and

the computer system operable for comparing the failure rate to the test criteria, and for repeating the stressing, testing and comparing until the failure rate fulfills the test criteria.

16. The device according to claim 15, wherein the burn-in test hardware receives performance data concerning the plurality of ICs for indicating which of the ICs have malfunctioned.

17. The device according to claim 16, wherein the burn-in test hardware sends the performance data to the computer systems which writes the performance data to the performance database.

18. The device according to claim 15, wherein the computer system calculates a failure rate of the plurality of ICs as a function of the performance data.

19. The device according to claim 15, wherein the computer system controls the stress chamber to adjust the burn-in interval as a function of the failure rate.

20. The device according to claim 15, wherein the computer system controls the stress chamber to adjust the burn-in interval as a function of the performance database.

21. The device according to claim 15, wherein the computer system controls the stress chamber to set a burn-in interval initially to a core time.

22. A dynamic duration burn-in device, comprising:

a controllable stress chamber;

a burn-in test hardware;

a computer system having a processing unit, input device and storage, and connected to the controllable stress chamber and the burn-in test hardware, the computer system programmed to execute the following;

providing a performance database for tracking burn-in test results of a plurality of ICs;

determining test criteria against which the burn-in test results will be compared;

stressing the plurality of ICs for a burn-in interval;

testing the plurality of ICs to determine instantaneous failure rate from burn-in;

comparing the instantaneous failure rate to the test criteria; and

repeating the stressing, testing and comparing until the failure rate fulfills the test criteria and stopping the burn-in before the end of the burn-in interval.

23. The dynamic duration burn-in device according to claim 22, wherein testing further comprises receiving performance data concerning the plurality of ICs and indicating which of the ICs have malfunctioned.

24. The dynamic duration burn-in device according to claim 22, wherein testing further comprises writing the performance data to the performance database.

25. The dynamic duration burn-in device according to claim 22, wherein testing further comprises calculating a failure rate of the plurality of ICs as a function of the performance data.

26. The dynamic duration burn-in device according to claim 22, wherein stressing further comprises dynamically adjusting the burn-in interval as a function of the failure rate.

27. The dynamic duration burn-in device according to claim 22, wherein stressing further comprises dynamically adjusting the burn-in interval as a function of the performance database.

28. The dynamic duration burn-in device according to claim 22, wherein stressing further comprises setting a burn-in interval initially to a core time.

29. A computer-implemented method for dynamic duration burn-in of integrated circuit, comprising:

defining a burn-in interval for the integrated circuits

stressing the integrated circuits in a stress chamber;

periodically testing the integrated circuits to determine an instantaneous failure rate; and

stopping the stressing when the instantaneous failure rate is equal to approximately a random failure rate.

30. A method for dynamic duration burn-in of integrated circuits, comprising:

providing a computer system having a processing unit, input device and storage,

providing a stress chamber;

placing a plurality of integrated circuits in the stress chamber;

simultaneously stressing and testing the integrated circuits to measure an instantaneous failure rate, and

stopping the stressing and testing when the instantaneous failure rate at or below a predefined failure rate.

31. A dynamic duration stress testing device, comprising:

a computer system having a processing unit, input device and memory;

a performance database residing in the memory for tracking stress test results of a plurality of integrated circuits and test criteria against which the stress test results will be compared;

a stress chamber connected to the computer system and operable for stressing the plurality of integrated circuits for a dynamic stress time interval;

a test device connected to the computer and operable for periodically testing the plurality of integrated circuits to determine an instantaneous failure rate; and

the computer system operable for comparing the instantaneous failure rate to the test criteria, and for repeating the stressing, testing and comparing until the failure rate drops to a rate approximately equivalent to a random failure rate.

32. The device according to claim 31, wherein the stress device dynamically adjusts the stress test time interval as a function of the failure rate.

33. The device according to claim 31, wherein the random failure rate is measured as a zero slope portion of a curve plotting hazard rate to time.