Semiconductor device comprising a glass supporting body onto which a substrate with semiconductor elements and a metalization is attached by means of an adhesive

• US 6,177,707 B1
• Filed: 02/26/1999
• Issued: 01/23/2001
• Est. Priority Date: 03/02/1998
• Status: Expired due to Term

• Current Assignee: Invensas Corporation
• Original Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Inventors: Dekker, Ronald, Maas, Henricus G. R., Van Deurzen, Maria H. W. A.
• Primary Examiner(s): Abraham, Fetsum
• Application Number:
  US09/258,430
• Time in Patent Office: 697 Days
• Field of Search: 257/347, 257/752, 257/751, 257/763-765, 257/758-760, 257/348, 257/349, 257/351, 257/353, 257/355
• US Class Current: 257/347
• CPC Class Codes: H01L 21/7624 using semiconductor on insulator [SOI] technology H01L21/76297 takes precedence; manufacture of integrated circuits on insulating substrates H01L21/84; silicon on sapphire [SOS] technology H01L21/86
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 2224/02166 Collar structures
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/48463 the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/14 Integrated circuits

Abstract

A thin film semiconductor device includes a glass supporting body having thereon an insulating substrate which is attached thereto by a layer of adhesive material. On the surface of the substrate facing the supporting body is a layer of semiconductor material which includes therein a semiconductor element, such surface further having thereon a metalization pattern of conductor tracks. An insulating layer is additionally provided between the metalization pattern and the adhesive layer, and has a dielectric constant ε_r below 3 and a thickness in the range of approximately 20 μm to 60 μm. By virtue of such additional layer, parasitic capacitanees between the metalization pattern and an envelope in which the device is included or a printed circuit board on which the device is mounted are reduced substantially, thereby reducing the power consumption of the device.

Claims

1. A thin film semiconductor device comprising:

a glass supporting body having thereon an insulating substrate which is attached thereto by a layer of adhesive material;

said substrate having, on a surface thereof facing the glass supporting body, a layer of semiconductor material which includes a semiconductor element, said substrate surface further having thereon a metalization pattern of conductor tracks; and

an insulating layer provided between said metalization pattern and said layer of adhesive material, said insulating layer having a dielectric constant γ

_r below 3 and a thickness in the range of approximately 20 μ

m to 60 μ

m.

2. A semiconductor device as claimed in claim 1, characterized in that the insulating layer having a dielectric constant ε

_r below 3 is also provided between the conductor tracks of the metalization.

3. A semiconductor device as claimed in claim 1, characterized in that the insulating layer having a dielectric constant ε

_r below 3 is a layer of parylene or benzocyclobutene.

4. A semiconductor device as claimed in claim 3, characterized in that both the insulating layer having a dielectric constant ε

_r below 3 and the layer of an adhesive are layers of benzocyclobutene.