Selectively doped electrostatic discharge layer for an integrated circuit sensor

• US 6,180,989 B1
• Filed: 08/31/1998
• Issued: 01/30/2001
• Est. Priority Date: 02/17/1998
• Status: Expired due to Term

• Current Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Inventors: Thomas, Danielle A., Bryant, Frank R.
• Primary Examiner(s): MINTEL, WILLIAM A
• Application Number:
  US09/144,182
• Time in Patent Office: 883 Days
• Field of Search: 257/414, 257/655, 257/657, 257/532, 257/534, 257/415, 257/417, 257/418, 438/48
• US Class Current: 257/414
• CPC Class Codes: G06V 40/1329 Protecting the fingerprint sensor against damage caused by the finger
• CPC Class Codes: Y10S 438/931 Silicon carbide semiconductor
• CPC Class Codes: Y10S 438/953 Making radiation resistant device
• CPC Class Codes: Y10S 438/958 Passivation layer

Abstract

A structure and method for creating an integrated circuit passivation structure comprising, a circuit, a dielectric, and metal plates over which an insulating layer is disposed that electrically isolates the circuit, and a discharge layer that is deposited to form the passivation structure that protects the circuit from electrostatic discharges caused by, e.g., a finger, is disclosed. The discharge layer additionally contains dopants selectively deposited to increase electrostatic discharge carrying capacity while maintaining overall sensing resolution.

Claims

1. An integrated circuit, comprising:

a substrate;

sensor circuits disposed on the substrate;

isolation regions disposed on the substrate between the sensor circuits;

an insulating layer disposed on the sensor circuits and the isolation regions; and

an electric discharge layer disposed on the insulating layer and including, in areas above the sensor circuits, a first concentration of a first dopant, and including in areas above the isolation regions a second concentration of a second dopant, the second concentration greater than the first concentration.

2. The integrated sensor of claim 1 wherein the dopant is selected from the group consisting essentially of phosphorous, boron and arsenic.

3. The integrated sensor of claim 1 wherein the sensor circuits are arranged in a grid pattern.

4. The integrated sensor of claim 1 wherein the sensing circuits comprise both sensing and non-sensing portions and wherein the areas of the electric discharge layer doped with the second dopant cover part of the non-sensing portions of the sensing circuits.

5. The integrated sensor of claim 1 wherein the first dopant is implanted into the electric discharge layer.

6. The integrated sensor of claim 1 wherein the electric discharge layer is defined as comprising:

a silicon carbide layer disposed over the insulating layer;

a discharge layer, wherein the discharge layer is SiC_x and wherein x is less than 1.

7. The integrated sensor of claim 1 wherein the first concentration of the first dopant is zero.

8. The integrated sensor of claim 1 wherein the first dopant and the second dopant comprise the same dopant.

9. A fingerprint sensor on an integrated circuit comprising:

a substrate;

a plurality of sensor circuits disposed on the substrate and each separated from one another by offset areas;

an insulating layer disposed over the sensor circuitry and the offset areas; and

an electric discharge layer disposed over the insulating area, the electric discharge layer containing a higher concentration of charge-carrying dopants in areas above the offset areas than in other areas of the electric discharge layer.

10. The fingerprint sensor of claim 9 wherein the other areas of the electric discharge layer contain no dopants.

11. The integrated sensor of claim 9 wherein the charge-carrying dopants comprise one or more of boron, phosphorous, and arsenic.

12. The integrated sensor of claim 9 wherein the sensor circuits are arranged in a grid pattern and the offset areas surround each sensor circuit.

13. The integrated sensor of claim 9 wherein the sensing circuits comprise both sensing and non-sensing portions and wherein the areas of the electric discharge layer having a higher concentration of charge-carrying dopants cover the non-sensing portions of the sensing circuitry.

14. The integrated sensor of claim 9 wherein the dopants are implanted into the electric discharge layer.

15. The integrated sensor of claim 9 wherein the electric discharge layer is defined as comprising:

a silicon carbide layer covering the insulating layer; and

a discharge layer adjacent to the silicon carbide layer, wherein the discharge layer is SiC_x and wherein x is less than 1.

16. The integrated sensor of claim 9 wherein the higher concentration areas are doped with the same type of dopant as the other areas of the electric discharge layer.