Semiconductor device comprising a polydiode element

• US 6,180,996 B1
• Filed: 07/15/1998
• Issued: 01/30/2001
• Est. Priority Date: 02/06/1998
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Takada, Hiroshi, Mihara, Masaaki, Onoda, Hiroshi
• Primary Examiner(s): Carroll, J.
• Application Number:
  US09/115,518
• Time in Patent Office: 930 Days
• Field of Search: 257/915, 257/316, 257/536-7, 257/640, 257/649, 257/751, 257/755, 257/763
• US Class Current: 257/536
• CPC Class Codes: H10B 41/40 characterised by the peripheral circuit region
• CPC Class Codes: H10B 41/49 comprising different types of peripheral transistor
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

An aluminum wire is connected to a P-type layer of a polydiode element through a resistive element consisting of a barrier metal film and a tungsten plug. Another aluminum wire is connected to an N-type layer of the polydiode element through another resistive element consisting of another barrier metal film and another tungsten plug. Thus, a semiconductor device including a polydiode element which is resistant to surge or contamination is provided.

Claims

1. A semiconductor device comprising:

a semiconductor substrate having a major surface;

an element isolation oxide film being provided on said major surface of said semiconductor substrate;

a polydiode element, being provided on said element isolation oxide film, comprising a P-N junction polysilicon layer having a P-type layer and a N-type layer;

a protective film formed on a surface of said P-N junction polysilicon layer for preventing the polydiode element from contamination;

an interlayer isolation film being provided on said major surface of said semiconductor substrate to cover said polydiode element;

a first contact hole and a second contact hole being provided in said interlayer isolation film for exposing said P-type layer and said N-type layer respectively;

a first resistive element being provided in said first contact hole and connected with said P-type layer;

a second resistive element being provided in said second contact hole and connected with said N-type layer;

a first wiring layer being connected to said P-type layer through said first resistive element; and

a second wiring layer being connected to said N-type layer through said second resistive element, wherein the protective film consists of a multilayer film of an oxide film and a nitride film.

2. The semiconductor device in accordance with claim 1, further comprising a nonvolatile semiconductor storage element, being formed on said semiconductor substrate, having a floating gate of polysilicon,

said polydiode element being made of the same material as said floating gate.

3. The semiconductor device in accordance with claim 1, wherein said first and second resistive elements are made of barrier metals and/or tungsten plugs.

4. The semiconductor device in accordance with claim 1, wherein said N-type layer consists of an N⁺-type layer being connected with said P-type layer and an N⁺⁺-type layer being connected with said N⁺-type layer.

5. The semiconductor device in accordance with claim 1, wherein said polydiode element is built in a charge-pump step-up circuit as a part thereof.

6. The semiconductor device in accordance with claim 1, wherein said polydiode element is made of non-doped polysilicon.

7. The semiconductor device according to claim 1, wherein said protective film is formed on an upper surface of said P-N junction polysilicon layer.

8. The semiconductor device according to claim 1, wherein said protective film is formed at a side wall surface of said P-N junction polysilicon layer.

9. A semiconductor device comprising:

a semiconductor substrate; and

a nonvolatile semiconductor storage element and a polydiode element being formed on said semiconductor substrate;

said nonvolatile semiconductor storage element including;

(A) a floating gate of N-type polysilicon being formed on said semiconductor substrate;

(B) an interpoly dielectric film, being provided on said floating gate, consisting of a multilayer film of an oxide film and a nitride film, and

(C) a control gate, being provided on said interpoly dielectric film, having a lower layer of N-type polysilicon and an upper layer of metal silicide,

said polydiode element comprising;

(a) an element isolation oxide film being provided on a surface of said semiconductor substrate,

(b) a P-N junction polysilicon layer, being provided on said element isolation oxide film, having a P-type layer and an N-type layer,

(c) a protective film formed on a surface of said P-N junction polysilicon layer for preventing the polydiode element from contamination;

(d) an interlayer isolation film being provided on said semiconductor substrate to cover said P-N junction polysilicon layer,

(e) a first contact hole and a second contact hole being provided in said interlayer isolation film for exposing said P-type layer and said N-type layer respectively,

(f) a first resistive element, being provided in said first contact hole and connected with said P-type layer, consisting of a barrier metal and/or a tungsten plug,

(g) a second resistive element, being provided in said second contact hole and connected with said N-type layer, consisting of a barrier metal and/or a tungsten plug,

(h) a first wiring layer being connected to said P-type layer through said first resistive element, and

(i) a second wiring layer being connected to said N-type layer through said second resistive element wherein said protective film consists of a multilayer film of an oxide film and a nitride film.