Copper interconnection structure incorporating a metal seed layer

• US 6,181,012 B1
• Filed: 04/27/1998
• Issued: 01/30/2001
• Est. Priority Date: 04/27/1998
• Status: Expired due to Term

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Hu, Chao-Kun, Simon, Andrew H., Edelstein, Daniel Charles, Harper, James McKell Edwin, Uzoh, Cyprian Emeka
• Primary Examiner(s): Hardy, David
• Application Number:
  US09/067,851
• Time in Patent Office: 1,009 Days
• Field of Search: 257/762, 257/751, 438/687, 438/627, 438/643, 438/653, 438/927
• US Class Current: 257/762
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76871 Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 23/53233 Copper alloys
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The present invention discloses an interconnection structure for providing electrical communication with an electronic device which includes a body that is formed substantially of copper and a seed layer of either a copper alloy or a metal that does not contain copper sandwiched between the copper conductor body and the electronic device for improving the electromigration resistance, the adhesion property and other surface properties of the interconnection structure. The present invention also discloses, methods for forming an interconnection structure for providing electrical connections to an electronic device by first depositing a seed layer of copper alloy or other metal that does not contain copper on an electronic device, and then forming a copper conductor body on the seed layer intimately bonding to the layer such that electromigration resistance, adhesion and other surface properties of the interconnection structure are improved.

Claims

1. An interconnection structure for providing electrical connections to an electronic device comprising:

a body formed of copper and between about 0.001 and about 10 weight percent of at least one alloying element selected from the group consisting of C, N, Cl, O and S, and

a copper alloy seed layer sandwiched in between and in intimate contact with both said body and said electronic device for improving electromigration resistance of said interconnection structure.

2. An interconnection structure according to claim 1, wherein said copper alloy seed layer comprises copper and at least one element selected from the group consisting of Sn, In, Zr, Ti, C, N, O, Cl and S.

3. An interconnection structure according to claim 1, wherein said copper alloy seed layer has a thickness between about 0.1 nm and about 100 nm.

4. An interconnection structure according to claim 1, wherein said copper alloy seed layer has a thickness preferably between about 1 nm and about 100 nm.

5. An interconnection structure according to claim 1, wherein said copper alloy seed layer is formed of a metal compound, a metal solid solution or a two-phase mixtures of metal phases.

6. An interconnection structure according to claim 1, wherein said copper alloy seed layer is a copper containing about 0.5 atomic % of Sn or In.

7. An interconnection structure according to claim 1, wherein said structure is used either on-chip or off-chip.

8. An interconnection structure according to claim 1, wherein said structure is a member selected from the group consisting of a via, a line, a stud and a wiring lead for TAB, BGA or PGA.

9. An interconnection structure according to claim 1, wherein said interconnection structure is a multi-level structure having between 2 and 10 wiring levels.

10. An interconnection structure according to claim 1, wherein said interconnection structure is built on a previously deposited layer of metal silicide or W stud and W local interconnections.

11. An interconnection structure for providing electrical connection to an electronic device comprising:

a copper conductor body, and

a copper alloy seed layer sandwiched in between and in intimate contact with both said copper conductor body and a diffusion barrier layer formed on said electronic device for improving adhesion to said underlying diffusion barrier layer, said copper alloy seed layer comprises copper and at least one element selected from the group consisting of Al, Mg, Be, Ca, Sr, Ba, Sc, Y, La, Ce, Pr, Nd, Sm, Eu, Gd, Pb, Dy, Ho, Er, Tm, Yb, Lu, Si and Ge.

12. An interconnection structure according to claim 11, wherein said copper alloy seed layer has an electrical resistivity larger than the electrical resistivity for the copper conductor body.

13. An interconnection structure according to claim 11, wherein said copper alloy seed layer has a thickness between about 0.1 nm and about 100 nm.

14. An interconnection structure according to claim 11, wherein copper conductor body is formed substantially of copper is formed by copper and between about 0.001 and about 10 weight percent of at least one alloying element selected from the group consisting of C, N, Cl and O.

15. An interconnection structure according to claim 11, wherein said copper alloy seed layer is formed of a metal compound, a metal solid solution or a two-phase mixtures of metal phases.

16. An interconnection structure according to claim 11, wherein said structure is a member selected from the group consisting of a via, a line, a stud and a wiring lead for TAB, BGA or PGA.

17. An interconnection structure according to claim 11, wherein said interconnection structure is a multi-level structure having between 2 and 10 wiring levels.

18. An interconnection structure according to claim 11, wherein said interconnection structure is built on a previously deposited layer of metal silicide.

19. An interconnection system for providing electrical connection to an electronic device comprising:

a copper conductor body, and

a copper alloy seed layer sandwiched in between and in intimate contact with both said copper conductor body and said electronic device for improving the surface properties of the electronic device, said copper alloy seed layer comprises copper and at least one element selected from the group consisting of B, O, N, P, Fe, Ru, Os, Co, Rh, Ir, Ni, Pd, Pt, Ag, Au, Zn and Cd.

20. An interconnection system according to claim 19, wherein said copper alloy seed layer has a thickness between about 0.1 nm and about 100 nm.

21. An interconnection system according to claim 19, wherein said structure is a member selected from the group consisting of a via, a line, a stud and a wiring lead for TAB, BGA or PGA.

22. An interconnection system according to claim 19, wherein said copper conductor body formed substantially of copper is formed by copper and between about 0.001 and about 10 weight percent of at least one alloying element selected from the group consisting of C, N, O, Cl and S.

23. An interconnection system according to claim 19, wherein said copper alloy seed la-phase mixtures of metal phases.

24. An interconnection system for providing electrical connection to an electronic device comprises:

a copper conductor body, and

a metal seed layer sandwiched in between and in intimate contact with both said copper conductor body and said electronic device for improving the copper conductor deposition process, said metal seed layer is deposited of a metal which has a solubility in copper so low such that substantially no copper compounds can be formed, said metal seed layer having a thickness between about 0.1 nm and about 100 nm.

25. An interconnection system according to claim 24, wherein said diffusion barrier layer is deposited of a material selected from the group consisting of Ti, Ta, Nb, Mo, TaN, W, WN, TiN, TaSiN, WSiN, TiAlN and TiSiN.

26. An interconnection system according to claim 24, wherein said structure is used either on-chip or off-chip.

27. An interconnection structure according to claim 24, wherein said structure is a member selected from the group consisting of a via, a line, a stud and a wiring lead for TAB, BGA or PGA.

28. An interconnection structure according to claim 24, wherein said interconnection structure is a multi-level structure having between 2 and 10 wiring levels.

29. An interconnection system according to claim 24, wherein said metal has an electrical resistivity substantially similar to the electrical resistivity of copper.

30. An interconnection system according to claim 24, wherein said metal is selected from the group consisting of Ag, Mo, W and Co.