Probe card

• US 6,181,145 B1
• Filed: 10/13/1998
• Issued: 01/30/2001
• Est. Priority Date: 10/13/1997
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Yamaguchi, Seiji, Tomita, Yasuhiro
• Primary Examiner(s): Nguyen, Vinh P.
• Application Number:
  US09/170,634
• Time in Patent Office: 840 Days
• Field of Search: 324/754, 324/755, 324/765, 324/760, 324/761, 439/482, 439/842
• US Class Current: 324/750.03
• CPC Class Codes: G01R 1/0735 arranged on a flexible frame or film

Abstract

A probe card provides electrical connection between an IC device under test (DUT) and a testing apparatus. The probe card includes: a test chip for transferring a signal between the DUT and the testing apparatus; and a contact bump provided at a position corresponding to a pad of the test chip, wherein the test chip is provided to securely press the contact bump against the DUT, thereby establishing the electrical connection between the DUT and the contact bump.

Claims

1. A probe card for providing electrical connection between an IC device under test (DUT) and a testing apparatus, the probe card comprising:

a test chip for transferring a signal between the DUT and the testing apparatus;

a contact bump provided at a position corresponding to a pad of the test chip; and

a test chip securing plate provided on a reverse surface of the test chip,

wherein the test chip is provided to securely press the contact bump against the DUT by a load applied to the reverse surface of the test chip from the test chip securing plate, thereby establishing the electrical connection between the DUT and the contact bump.

2. A probe card according to claim 1, further comprising a membrane provided between the contact bump and the test chip, wherein:

the membrane has wiring for electrically connecting the contact bump, the test chip and the testing apparatus to one another; and

the test chip securely presses the contact bump against the DUT from a reverse side of the membrane.

3. A probe card according to claim 2, wherein:

a bump electrode is provided on the reverse side of the membrane so as to be connected to the contact bump;

the test chip is flip-chip mounted to the bump electrode with a connection bump; and

height variation among the contact bumps is compensated for by a change in height of the connection bump resulting from deformation thereof, whereby an uneven surface defined by tips of the contact bumps is aligned with a surface defined by the pads of the DUT.

4. A probe card according to claim 3 wherein the uneven surface defined by tips of the contact bumps is prefixed so as to be aligned with the surface defined by the pads of the DUT.

5. A probe card according to claim 2, wherein:

a bump electrode is provided on the reverse side of the membrane so as to be connected to the contact bump;

the test chip is flip-chip mounted to the bump electrode via a bumper electrode array including an insulative elastic body and a plurality of relay electrodes running through the insulative elastic body; and

height variation among the contact bumps is compensated for by the bumper electrode array having a variable thickness, whereby an uneven surface defined by tips of the contact bumps is aligned with a surface defined by the pads of the DUT.

6. A probe card according to claim 1, the test chip comprising:

a. plurality of tester channel pads to which a plurality of tester channels of the testing apparatus are connected, respectively;

a plurality of device channel pads connected to the contact bumps, respectively; and

a tri-state buffer,

wherein one of the tester channel pads which is used only for inputting a signal to the testing apparatus and another one of the tester channel pads which is only used for outputting a signal from the testing apparatus are connected to one of the device channel pads via a tri-state buffer as a pair of the tester channel pads; and

a tri-state control input for the tri-state buffer is connected to the tester channel pad and is controlled directly by the testing apparatus.

7. A probe card according to claim 6, wherein a load circuit is connected to the device channel pad in the test chip.

8. A probe card according to claim 6, the test chip comprising:

a plurality of bi-directional multiplexers for selectively connecting signals from the tester channel pads to the plurality of device channel pads; and

a selection signal generation circuit for receiving the signals from the tester channel pads as an input and providing a selection signal to the bi-directional multiplexers.

9. A probe card according to claim 8, wherein:

a signal latch circuit is connected to the device channel pad for storing a signal on the device channel pad; and

the signal latch circuit is selectively disconnected from the device channel pad in response to the selection signal from the selection signal generation circuit.

10. A probe card according to claim 8, wherein:

the selection signal generation circuit of the test chip includes a bit width conversion circuit and a memory circuit;

the bit width conversion circuit increases a bit width of data to be input to the tester channel pad and writes the data in the memory circuit;

the selection signal is generated from an output of the memory circuit; and

an address signal of the memory circuit is input through the tester channel pad.

11. A probe card according to claim 1, further comprising:

a securing plate holding mechanism for supporting the test chip securing plate,

wherein the securing plate holding mechanism is supported about a rotational axis perpendicular to a longitudinal direction of the pads of the DUT.

12. A probe card according to claim 11, wherein the securing plate holding mechanism supports the test chip securing plate at the center of gravity of the pads of the DUT.

13. A probe card according to claim 11, further comprising a temperature control section provided on the test chip securing plate, wherein the temperature control section is used to control a temperature of the test chip.

14. A probe card for providing electrical connection between an IC device under test (DUT) and a testing apparatus, the probe card comprising:

a test chip for transferring a signal between the DUT and the testing apparatus;

a contact bump provided at a position corresponding to a pad of the test chip;

a test chip securing plate provided on a reverse surface of the test chip, and

a securing plate holding mechanism for supporting the test chip securing plate,

wherein the test chip is provided to securely press the contact bump against the DUT, thereby establishing the electrical connection between the DUT and the contact bump; and

wherein the securing plate holding mechanism is supported about a rotational axis perpendicular to a longitudinal direction of the pads of the DUT.

15. A probe card according to claim 14, wherein the securing plate holding mechanism supports the test chip securing plate at a center of gravity of the pads of the DUT.

16. A probe card according to claim 14, further comprising a temperature control section provided on the test chip securing plate, wherein the temperature control section is used to control a temperature of the test chip.

17. A probe card for providing electrical connection between an IC device under test (DUT) and a testing apparatus, the probe card comprising:

a test chip for transferring a signal between the DUT and the testing apparatus;

a contact bump provided at a position corresponding to a pad of the test chip;

a membrane provided between the contact bump and the test chip;

a hermetic structure provided on the reverse side of the membrane; and

an insulative coolant filled in the hermetic structure into which the test chip is placed,

wherein the test chip is provided to securely press the contact bump against the DUT, thereby establishing the electrical connection between the DUT and the contact bump;

the membrane has wiring for electrically connecting the contact bump, the test chip and the testing apparatus to one another;

the test chip securely presses the contact bump against the DUT from a reverse side of the membrane; and

temperature control for the membrane and the test chip is performed by controlling a temperature of the coolant.