Fault tolerant task dispatching

• US 6,182,238 B1
• Filed: 05/14/1998
• Issued: 01/30/2001
• Est. Priority Date: 05/14/1998
• Status: Expired due to Term

• Current Assignee: TROP Pruner & HU
• Original Assignee: Intel Corporation
• Inventors: Cooper, Barnes
• Primary Examiner(s): Beausoliel, Jr., Robert W.
• Assistant Examiner(s): Elisca, Pierre E.
• Application Number:
  US09/078,690
• Time in Patent Office: 992 Days
• Field of Search: 714/2, 714/3, 714/4, 714/7, 714/12, 714/13, 714/14, 714/38, 714/22, 714/43, 714/47, 714/34, 714/30, 714/48, 714/55, 714/814, 714/815, 370/220, 370/228, 710/260, 710/264, 710/266, 710/269, 709/100, 709/106, 709/107, 702/100, 702/89, 702/102, 702/119, 702/123, 702/125, 717/11, 711/103, 379/10
• US Class Current: 714/2
• CPC Class Codes: G06F 11/0715 in a system implementing multitasking multitasking per se G06F9/46
• CPC Class Codes: G06F 11/0757 by exceeding a time limit, i.e. time-out, e.g. watchdogs
• CPC Class Codes: G06F 9/4843 by program, e.g. task dispatcher, supervisor, operating system

Abstract

A fault tolerant task dispatching technique schedules a plurality of tasks, monitors the progress of each task on a periodic basis, detects when a task has failed, and initializes a failed task in a manner that does not interfere with the execution of any non-failed task. Task granularity, afforded by the fault tolerant dispatch technique, allows each task (device service routine) to be designed substantially independently of any other task. This, in turn, can ease the design and implementation of individual tasks as well as their integration into a computer system.

Claims

1. A microcontroller for controlling a plurality of devices through device service routines, comprising:

a dispatcher to schedule the plurality of device service routines for execution;

a detector to detect when a device service routine fails to complete execution within a specified time period; and

a circuit to terminate the failed device service routine and to dispatch another of the plurality of the device service routines.

2. The microcontroller of claim 1, wherein the specified time period is determined by a timer.

3. The microcontroller of claim 2, wherein the timer is configured to generate a periodic interrupt.

4. The microcontroller of claim 3, wherein the periodic interrupt is a non-maskable interrupt.

5. The microcontroller of claim 1, wherein the specified time period is between approximately 1 millisecond and approximately 10 milliseconds.

6. An interrupt service method comprising:

receiving an interrupt;

adjusting a timer value, the timer value associated with a device service routine;

initializing an interrupt timer to generate the interrupt at a fixed time interval;

marking the device service routine as failed if the adjusted timer value is a specified value; and

resuming execution of the device service routine if the adjusted timer value is not the specified value.

7. The method of claim 6, wherein the interrupt is a non-maskable interrupt.

8. The method of claim 6, wherein the fixed time interval is between approximately 1 millisecond and approximately 10 milliseconds.

9. The method of claim 6, wherein the fixed time interval is 5 milliseconds.

10. The method of claim 6, wherein marking comprises setting a flag associated with the device service routine.

11. The method of claim 6, wherein the specified value is less than or equal to zero.

12. The method of claim 6, wherein adjusting comprises decrementing the timer value.

13. The method of claim 6 wherein resuming execution further comprising entering a low power mode.

14. A fault tolerant task dispatching method comprising:

identifying a current task from a plurality of tasks, each task associated with a timer value and information indicating whether the task is executing and whether the task is failed;

initializing the current task if it is indicated as failed;

identifying a next task; and

scheduling the next task if the timer value associated with the next task is a specified value.

15. The method of claim 14, wherein the specified value is less than or equal to zero.

16. The method of claim 15, further comprising entering a low power mode if the timer values associated with each task is not the specified value.

17. The method of claim 14, wherein initializing comprises:

executing an initialization routine associated with the failed task;

setting a timer value associated with the failed task; and

indicating the failed task as idle.

18. The method of claim 17, wherein the timer value is greater than zero.

19. The method of claim 14, wherein scheduling comprises:

executing a task initialization routine associated with the next task;

setting a timer value associated with the next task;

indicating the next task as executing; and

executing a device service routine associated with the next task.

20. The method of claim 19, wherein the timer value is between approximately 1 millisecond and approximately 10 milliseconds.

21. A program storage device, readable by a computer system, having instructions stored thereon for causing the computer system to:

identify a current task from a plurality of tasks, each task associated with a timer value and information indicating whether the task is executing and whether the task is failed;

initialize the current task if it is indicated as failed;

identify a next task; and

schedule the next task if the timer value associated with the next task is a specified value.

22. The program storage device of claim 21, wherein the specified value is less than or equal to zero.

23. The program storage device of claim 21, further comprising instructions to enter a low power mode if the timer values associated with each task is not the specified value.

24. The program storage device of claim 21, wherein the instructions to initialize include instructions to:

execute an initialization routine associated with the failed task;

set a timer value associated with the failed task; and

indicate the failed task as idle.

25. The program storage device of claim 24, wherein the timer value is greater than zero.

26. The program storage device of claim 21, wherein instructions to schedule include instructions to:

execute a task initialization routine associated with the next task;

set a timer value associated with the next task;

indicate the next task as executing; and

execute a device service routine associated with the next task.

27. The program storage device of claim 26, wherein the timer value is between approximately 1 millisecond and approximately 10 milliseconds.