Method for manufacturing a semiconductor device

• US 6,184,106 B1
• Filed: 09/21/1998
• Issued: 02/06/2001
• Est. Priority Date: 06/27/1996
• Status: Expired due to Term

• Current Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.), SK Hynix Inc.
• Original Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Inventors: Chung, Myung Jun
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): JONES, JOSETTA I
• Application Number:
  US09/157,472
• Time in Patent Office: 869 Days
• Field of Search: 438/425, 438/439, 438/444
• US Class Current: 438/425
• CPC Class Codes: H01L 21/76205 in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
• CPC Class Codes: H01L 21/76229 Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches

Abstract

The present invention provides a method of forming an isolation region comprising a trench isolation region involved in a semiconductor device. A silicon oxide film is grown on a surface of a trench groove formed within a semiconductor substrate, followed by a deposition of a nitride film material. An oxide film is formed on the silicon oxide film of the wide trench groove region. The nitride film within the trench groove region, so as to form a device isolation film is etched, sequentially, a oxide film is deposited on the entire exposed surface of the trench region, and the oxide film except within the trench groove, is etched by using chemical mechanical polishing (CMP).

Claims

1. A method of fabricating a semiconductor device having a narrow isolation region and a wide isolation region on a semiconductor substrate, comprising the steps of:

forming a trench mask pattern on said semiconductor substrate using anti-oxidation material;

forming a first trench and a second trench in said narrow isolation region and said wide isolation region respectively, wherein the first trench and the second trench are formed using said trench mask pattern and forming a nitride film on the whole structure formed on said semiconductor substrate;

executing a blanket etching of said nitride film, thereby said nitride film is left in the first trench and side wall portion of the second trench;

forming a first oxide film in the second trench by thermal oxidation of said semiconductor substrate;

removing said trench mask pattern and said nitride film and forming a second oxide film on the whole structure formed on said semiconductor substrate; and

etching back the second oxide film, thereby the first trench is buried with the second oxide film and side wall portion of the second trench is covered with the second oxide film.

2. The method defined in claim 1, wherein the trench mask pattern is composed of a pad oxide film and a nitride film sequentially stacked.

3. The method defined in claim 1, wherein the second oxide film is deposited by chemical vapor deposition (CVD) method.

4. The method defined in claim 1, wherein the step of etching back the second oxide film is carried out by using blanket dry etching method.

5. The method defined in claim 1, wherein the step of etching back the second oxide film is carried out by chemical mechanical polishing (CMP) method.