Look-up table based logic element with complete permutability of the inputs to the secondary signals
First Claim
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1. In a programmable logic device, a logic element comprising:
- a memory;
a multiplexor having a plurality of control inputs and a plurality of data inputs, the plurality of data inputs being coupled to said memory;
a storage block coupled to said multiplexor, wherein said storage block stores an output of said multiplexor;
a first plurality of inputs coupled to said control inputs of said multiplexor, said first plurality of inputs being sufficient in number to uniquely select between each of the plurality of data inputs to said multiplexor, each of said first plurality of inputs being programmably coupled to said storage block;
a combinatorial output, coupled to said multiplexor; and
a registered output, coupled to said storage block.
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Abstract
A logic element for a programmable logic device. The logic element includes a look-up table (400) for implementing logical functions, a programmable delay block (415), a storage block (430) configurable as a latch or a flip-flop, and a diagnostic shadow latch (435). A plurality of inputs (410) to the logic element and complements of these inputs are available to control the secondary functions of the storage block (430).
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Citations
27 Claims
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1. In a programmable logic device, a logic element comprising:
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a memory;
a multiplexor having a plurality of control inputs and a plurality of data inputs, the plurality of data inputs being coupled to said memory;
a storage block coupled to said multiplexor, wherein said storage block stores an output of said multiplexor;
a first plurality of inputs coupled to said control inputs of said multiplexor, said first plurality of inputs being sufficient in number to uniquely select between each of the plurality of data inputs to said multiplexor, each of said first plurality of inputs being programmably coupled to said storage block;
a combinatorial output, coupled to said multiplexor; and
a registered output, coupled to said storage block. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 23)
first plurality of inputs are programmably coupled to a clear input of said storage block. -
6. The logic element of claim 1 wherein each of said
first plurality of inputs are programmably coupled to a preset input of said storage block. -
7. The logic element of claim 1 wherein each of said
first plurality of inputs are programmably coupled a clock enable input of said storage block. -
8. The logic element of claim 1 wherein each of said
first plurality of inputs are programmably coupled to a clock input of said storage block. -
9. The logic element of claim 8 further comprising:
a second plurality of inputs programmably coupled to said clock input of said storage block.
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10. The logic element of claim 1 further comprising:
a diagnostic shadow latch coupled to said memory and said storage block, wherein said diagnostic shadow latch stores and provides diagnostic data.
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11. The logic element of claim 1 further comprising:
a diagnostic shadow latch coupled to an input of said storage block and an output of said storage block, wherein said diagnostic shadow latch stores and provides diagnostic data.
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12. The logic element of claim 1 further comprising:
a diagnostic shadow latch coupled to a plurality of configuration loading pins for said memory, wherein said diagnostic shadow latch stores and provides diagnostic data.
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13. The system of claim 3 further comprising a secondary logic block with inputs coupled to the first plurality of inputs and the multiplexor and an output programmably coupled to the storage block.
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23. The logic element of claim 1 wherein the memory is a random access memory.
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14. A logic element for an integrated circuit, comprising:
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a memory having a plurality of outputs;
a multiplexor having a plurality of control inputs and a plurality of data inputs, the plurality of data inputs being coupled to said memory;
a storage block coupled to said multiplexor, wherein said storage block stores an output of said multiplexor;
a first plurality of inputs coupled to said control inputs of said multiplexor, said first plurality of inputs being sufficient in number to uniquely select between each of the plurality of data inputs to said multiplexor, each of said first plurality of inputs being programmably coupled to said storage block;
a second plurality of inputs coupled to said storage block providing complementary signals of each of said first plurality of inputs, respectively;
a combinatorial output, coupled to said multiplexor; and
a registered output, coupled to said storage block. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 24)
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25. In a programmable logic device, a logic element comprising:
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a memory for storing a plurality of data entries;
a storage element coupled to the memory;
a plurality of control inputs for selecting at least one of said data entries, said plurality of control inputs being programmably coupled to said storage element;
a first output port for outputting said selected data entry; and
a second output port coupled to said storage element for outputting said stored data entry. - View Dependent Claims (26, 27)
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Specification