Method and arrangement for generation of a time mean-value free binary signal

• US 6,184,814 B1
• Filed: 07/10/1998
• Issued: 02/06/2001
• Est. Priority Date: 07/14/1997
• Status: Expired due to Term

• Current Assignee: Unwired Planet LLC (JP Morgan Chase & Co)
• Original Assignee: Telefonaktiebolaget LM Ericsson
• Inventors: Mattisson, Sven Erik
• Primary Examiner(s): WAMSLEY, PATRICK G
• Application Number:
  US09/113,241
• Time in Patent Office: 942 Days
• Field of Search: 341/143, 341/155, 375/143, 375/150, 375/206, 375/321, 348/573, 360/46, 360/77.14
• US Class Current: 341/155
• CPC Class Codes: H03K 5/086 generated by feedback

Abstract

The present invention relates to the generation of a time mean value-free binary signal (O) from an input signal (IN). The device (10) comprises a feed-back loop adjusting the pulse ratio of the output signal by comparing its mean value to the mean value of a time mean value-free reference signal (J) and feeding-back the difference between said two mean values. The mean values are approximated by low pass filtering the binary signal (O) and the reference signal (J) with two filters (8, 7). If the filters (8, 7) are non-linear, the mean values of the filtered signals (S, FJ) can deviate from the mean values of the reference signal (O) and the reference signal (J). By constructing the filters (8, 7) as regards non-linearities, to be equal, the aforementioned discrepancy will be compensated, since the signals will deviate to the same degree from their theoretical values, when time mean value free.

Claims

1. A method for generating a time mean value-free binary signal (OUT) from an input signal (IN), comprising the steps of:

generating a first binary signal (O, O4) from an input signal and a control signal;

filtering the first binary signal (O, O4) through a first filter (8, 48) with substantially low pass characteristic, generating a first filtered signal (S, S4);

filtering a time mean value-free reference signal (J, J4) through a second filter (7, 47) with substantially low pass characteristic, generating a second filtered signal (FJ, FJ4); and

generating the control signal (C, C4) based on a difference signal between the first filtered signal (S, S4) and the second filtered signal (FJ, FJ4), said control signal being substantially proportional to the sum of the difference signal multiplied by a first constant and a second constant multiplied by the integral of said difference signal;

wherein the first filter (8, 48) and said second filter (7, 47) are substantially equal, and said time mean value-free binary signal (OUT) is constituted of said first binary signal (O, O4).

2. The method of claim 1, wherein said first binary signal (O, O4) is generated in a limiter (3) triggered by the input signal (IN), wherein the limiter (3) performs the step of subtracting.

3. The method of claim 1, wherein the input signal (IN) is analog.

4. The method of claim 1, wherein said second constant is zero, said control signal (C, C4) being substantially proportional to the difference between said first filtered signal (S, S4) and said second difference signal (FJ, FJ4).

5. The method of claim 1, wherein said step of generating said control signal (C, C4) is performed by integrating said difference signal, said difference signal being substantially proportional to the difference between said first filtered signal (S, S4) and said second filtered signal (FJ, FJ4).

6. The method of claim 1, further comprising, before said step of filtering the time mean value-free reference signal, the step of:

generating said time mean value-free reference signal (J, J4) by frequency dividing a second binary signal with regular flanks.

7. The method of claim 1, further comprising, before said step of filtering said time mean value-free reference signal, the step of:

generating said time mean value-free reference signal (J, J4) by frequency dividing said first binary signal (O, O4).

8. The method of claim 1, wherein the signal levels of said time mean value-free reference signal (J, J4) are substantially identical to the signal levels of said first binary signal (O, O4).

9. The method of claim 1, wherein the cut-off frequency of said first filter (8, 48) and the cut-off frequency of said second filter (7, 47) are both low in relation to the frequency of said input signal (IN).

10. A device (10, 40) for generating a time mean value-free binary signal from an input signal (IN), said device (10, 40) comprising:

a limiter (3, 43) for generating a first binary signal from the input signal and a control signal (C, C4);

a first filter (8, 48) of substantially low pass characteristic, connected to the output of said limiter (3, 43) and generating a first filtered signal (S, S4);

a second filter (7, 47) of substantially low pass characteristic generating a second filtered signal (FJ, FJ4) by filtering a time mean value-free reference signal (J, J4), said control signal (C, C4) being generated from a difference signal between said first filtered signal (S, S4) and said second filtered signal (FJ, FJ4); and

a regulator (9) connected via a first input to said first filter (8) and connected via a second input to said second filter (7), said regulator (9) generating said control signal (c) from said difference signal, said control signal being substantially proportional to the sum of said difference signal multiplied by a first constant and a second constant multiplied by the integral of said difference signal;

wherein said first filter (8, 48) and said second filter (7, 47) are substantially equal, and said time mean value-free binary signal of the device (OUT) consists of said first binary signal (O, O4).

11. The device of claim 10, wherein the value of said first constant is zero.

12. The device of claim 11, wherein the value of said second constant is zero.

13. The device of claim 10, further comprising a frequency divider (6, 46) connected to said second filter (7, 47) for generating said time mean value-free reference signal (J, J4) from a second binary signal with regular flanks.

14. The device of claim 13, wherein said second binary signal consists of said first binary signal (O, O4).

15. The device of claim 10, wherein the input signal (IN) is a data signal of substantially 50% probability of a high binary level.

16. The device of claim 10, wherein said regulator (9) comprises a difference signal former (9a) and a control signal former (9b), the output of said difference signal former (9a) being connected to the input of said control signal former (9b).

17. The device of claim 10, wherein the signal levels of said time mean value-free reference signal (J, J4) are substantially identical to the signal levels of said first binary signal (O, O4).