Solid-state image sensing device with image pick-up bolometers for noise containing image signal and reference bolometers for estimating noise and read-out circuit for producing noise-free image signal

• US 6,188,069 B1
• Filed: 12/03/1998
• Issued: 02/13/2001
• Est. Priority Date: 12/03/1997
• Status: Expired due to Term

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Endoh, Tsutomu
• Primary Examiner(s): Hannaher, Constantine
• Assistant Examiner(s): Gabor, Otilia
• Application Number:
  US09/205,091
• Time in Patent Office: 803 Days
• Field of Search: 250/338.1, 250/332, 250/252.1, 250/370.08, 250/339.01
• US Class Current: 250/338.1
• CPC Class Codes: G01J 5/20 using resistors, thermistors or semiconductors sensitive to radiation, e.g. photoconductive devices
• CPC Class Codes: H04N 25/21 for transforming thermal infrared radiation into image signals
• CPC Class Codes: H04N 25/67 applied to fixed-pattern noise, e.g. non-uniformity of response
• CPC Class Codes: H04N 25/677 for reducing the column or line fixed pattern noise
• CPC Class Codes: H04N 5/33 Transforming infrared radiation cameras or camera modules for generating image signals from infrared radiation H04N23/20; circuitry of SSIS for transforming infrared radiation into image signals H04N25/20

Abstract

A solid-state infrared image sensing device has an image pick-up pixel array having respective bolometers sequentially connected to a read-out circuit for producing an image carrying signal: However, the image carrying signal contains a fixed pattern noise due to the pattern of the bolometers: In order to produce a first reference signal representative of the standard magnitude of fixed pattern noise and a second reference signal representative of a deviation from the standard magnitude to the magnitude of fixed pattern noise at a selected image pick-up pixel, reference pixels are provided around the image pick-up pixel array.

Claims

1. A solid-state image sensing device comprising:

a plurality of image pick-up pixels respectively including bolometers varying the resistivity thereof depending upon the magnitude of an electromagnetic power incident thereon, and connected to a first constant voltage source;

a first signal output node for outputting an output data signal containing a noise component due to a pattern of said plurality of image pick-up pixels and representative of said resistivity of a selected image pick-up pixel sequentially selected from said plurality of image pick-up pixels;

a second signal output node for outputting a reference signal representative of the magnitude of said noise component of said selected image pick-up pixel;

a selector associated with said plurality of image pick-up pixels, and sequentially connecting said first signal output node through the bolometer of said selected image pick-up pixel to said first constant voltage source for producing said output data signal; and

a plurality of reference pixels located in the vicinity of said plurality of image pick-up pixels so as to produce said reference signal.

2. The solid-state image sensing device as set forth in claim 1, in which said plurality of image pick-up pixels are arranged in rows and columns, and said plurality of reference pixels includes

a first row of first reference pixels located along one of the outermost rows of image pick-up pixels,

a second row of second reference pixels located along the other of said outer most rows of image pick-up pixels,

a first column of third reference pixels located along one of the outermost columns of image pick-up pixels,

a second column of fourth reference pixels located along the other of said outermost columns of image pick-up pixels, and

four reference pixels located in the vicinity of the image pick-up pixels located at four corners of said plurality of image pick-up pixels arranged in rows and columns.

3. The solid-state image sensing device as set forth in claim 2, in which a first reference sub-signal flows through said four reference pixels for producing a first reference sub-signal representative of the magnitude of standard noise component at a predetermined one of said plurality of image pick-up pixels, and one of said first reference pixels, one of said second reference pixels, one of said third pixels and one of said fourth pixels are respectively selected form said first row, said second row, said first column and said second column together with said selected image pick-up pixel for producing a second reference sub-signal representative of a deviation between said magnitude of standard noise component and the magnitude of said noise component at said selected image pick-up pixel.

4. The solid-state image pick-up device as set forth in claim 3, in which said four reference pixels are connected in series between a first output sub-node of said second output node and said first constant voltage source, and said one of said first reference pixels, said one of said second reference pixels, said one of said third reference pixels and said one of said fourth reference pixels are connected in series between a second output sub-node of said second output node and a second constant voltage source different in potential level from said first constant voltage level.

5. The solid-state image pick-up device as set forth in claim 4, in which each of said plurality of image-pick up pixel is implemented by a series combination of a first switching transistor and said bolometer, and each of said first reference pixels, said second reference pixels, said third reference pixels, said fourth reference pixels and said four reference pixels is implemented by a series combination of a second switching transistor and a bolometer equivalent to said bolometer.

6. The solid-state image pick-up device as set forth in claim 5, in which said selector includes

a plurality of row selecting lines connected to said third reference pixels of said first column, said fourth reference pixels of said second column and said rows of image pick-up pixels and sequentially changed to an active level for selecting each row of image pick-up pixels, associated one of said third reference pixels and associated one of said fourth reference pixels,

a vertical shift register connected to said plurality of row selecting lines for sequentially changing said plurality of row selecting lines to said active level,

a plurality of column lines respectively connected to said columns of image pick-up pixels,

a plurality of first transfer gates connected between said plurality of column lines and said first signal output node,

a horizontal shift register respectively connected through control lines to said plurality of first transfer gates for sequentially connecting said plurality of column lines to said first signal output node,

a plurality of second transfer gates connected between said first reference pixels and said second output sub-node and sequentially gated by said to control lines, and

a plurality of third transfer gates connected between said second reference pixels and said first output sub-node and sequentially gated by said control lines.

7. The solid-state image sensing device as set forth in claim 6, in which said second switching transistors of said first reference pixels, said second switching transistors of said second reference pixels and said second switching transistors of said four reference pixels are turned on at all times, and said first reference pixels and said second reference pixels are sequentially selected by means of said plurality of second transfer gates and said plurality of third transfer gates, respectively.

8. The solid-state image sensing device as set forth in claim 7, in which said first constant voltage source and said second constant voltage source generate a ground voltage and a positive voltage, respectively, said second switching transistors of said first reference pixels and said second switching transistors of said second reference pixels are of the type generating a p-type conductive channel, and said second switching transistors of said four reference pixels are of the type generating an n-type conductive channel.

9. The solid-state image pick-up device as set forth in claim 3, in which said four reference pixels are connected in parallel between a first output sub-node of said second output node and said first constant voltage source, and said one of said first reference pixels, said one of said second reference pixels, said one of said third reference pixels and said one of said fourth reference pixels are connected in parallel between a second output sub-node of said second output node and a second constant voltage source different in potential level from said first constant voltage level.

10. The solid-state image pick-up device as set forth in claim 9, in which each of said plurality of image-pick up pixel is implemented by a series combination of a first switching transistor and said bolometer, and each of said first reference pixels, said second reference pixels, said third reference pixels, said fourth reference pixels and said four reference pixels is implemented by a series combination of a second switching transistor and a bolometer equivalent to said bolometer.

11. The solid-state image pick-up device as set forth in claim 10, in which said selector includes

a plurality of row selecting lines connected to said third reference pixels of said first column, said fourth reference pixels of said second column and said rows of image pick-up pixels and sequentially changed to an active level for selecting each row of image pick-up pixels, associated one of said third reference pixels and associated one of said fourth reference pixels,

a vertical shift register connected to said plurality of row selecting lines for sequentially changing said plurality of row selecting lines to said active level,

a plurality of column lines respectively connected to said columns of image pick-up pixels,

a plurality of first transfer gates connected between said plurality of column lines and said first signal output node,

a horizontal shift register respectively connected through control lines to said plurality of first transfer gates for sequentially connecting said plurality of column lines to said first signal output node,

a plurality of second transfer gates connected between said first reference pixels and said second output sub-node and sequentially gated by said control lines, and

a plurality of third transfer gates connected between said second reference pixels and said first output sub-node and sequentially gated by said control lines.

12. The solid-state image sensing device as set forth in claim 11, in which said second switching transistors of said first reference pixels, said second switching transistors of said second reference pixels and said second switching transistors of said four reference pixels are turned on at all times, and said first reference pixels and said second reference pixels are sequentially selected by means of said plurality of second transfer gates and said plurality of third transfer gates, respectively.

13. The solid-state image sensing device as set forth in claim 12, in which said first constant voltage source and said second constant voltage source generate a ground voltage and a positive voltage, respectively, said second switching transistors of said first reference pixels and said second switching transistors of said second reference pixels are of the type generating a p-type conductive channel, and said second switching transistors of said four reference pixels are of the type generating an n-type conductive channel.

14. A read-out circuit connected to a solid-state image sensing device including a plurality of image pick-up pixels each having a bolometer, comprising:

a first bipolar transistor connected between a common node and a first constant voltage source through the bolometer of a selected image pick-up pixel sequentially selected from said plurality of image pick-up pixels, and flowing a first branch current of a main current between said common node and said first constant voltage source, said bolometer of said selected image pick-up pixel having a resistivity representative of the intensity of a part of an electro-magnetic radiation and a noise component;

a second bipolar transistor connected between a second constant voltage source different in voltage level from said first constant voltage source and said common node through bolometers of first reference pixels incorporated in said solid-state image sensing device, and flowing said main current between said second constant voltage source and said common node, said first reference pixels having a resistivity representative of a deviation of said noise component from a standard noise component of one of said plurality of image pick-up pixels;

a third bipolar transistor connected between said common node and said first constant voltage source through bolometers of second reference pixels incorporated in said solid-state image sensing device, and flowing a second branch current of said main current between said common node and said first constant voltage source, said second reference pixels having a resistivity representative of said standard noise component;

an integrating capacitor connected between said first constant voltage source and said common node; and

a reset circuit connected between a source of reset level and said common node for periodically resetting said integrating capacitor to said reset level.

15. The read-out circuit as set forth in claim 14, in which said amount of said first branch current is roughly equal to the difference between the amount of said main current and the amount of said second branch current.

16. The read-out circuit as set forth in claim 15, said first bipolar transistor, said second bipolar transistor and said third bipolar transistor have respective base nodes biased by a first biasing voltage source, a second biasing voltage source and a third biasing voltage source, respectively, and said first biasing voltage source, said second biasing voltage source and said third biasing voltage source supply the base node of said first bipolar transistor, the base node of said second bipolar transistor and the base node of said third bipolar transistor with a first biasing voltage, a second biasing voltage and a third biasing voltage regulated in such a manner that said first branch current is roughly equal to the difference between the amount of said main current and the amount of said second branch current.

17. The read-out circuit as set forth in claim 14, in which said first constant voltage source and said second constant voltage source generate a ground voltage and a positive voltage, respectively, and said first bipolar transistor, said second bipolar transistor and said third bipolar transistor are the npn type, pnp type and npn type, respectively.