Photoelectric conversion devices and photoelectric conversion apparatus employing the same

• US 6,188,093 B1
• Filed: 09/02/1998
• Issued: 02/13/2001
• Est. Priority Date: 09/02/1997
• Status: Expired due to Term

• Current Assignee: Nikon Corporation
• Original Assignee: Nikon Corporation
• Inventors: Suzuki, Satoshi, Isogai, Tadao
• Primary Examiner(s): Jackson, Jr., Jerome
• Application Number:
  US09/146,323
• Time in Patent Office: 895 Days
• Field of Search: 257/230, 257/233, 257/258, 257/223, 257/292
• US Class Current: 257/230
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 31/068 the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells

Abstract

A photoelectric conversion device comprises a semiconductor substrate, a same-dopant-type semiconductor layer, a photodiode having a charge-accumulation region, a JFET (which has a gate region, a source region, a channel region, and a drain region, the drain region electrically connected to the substrate 100), a transfer gate for transferring a charge from the photodiode to the gate region, and a reset drain having a charge-drain region for draining excess charges generated by the photodiode, the reset drain also controlling the electric potential of the gate region. Two overflow-control regions are included, one at the boundary between the charge-accumulation region and the charge-drain region within the device, one at the boundary between the charge-accumulation region and the charge-drain region of an adjacent device. Two reset gates are also provided, one at the boundary between the JFET gate and the reset drain within a device and one at the boundary between the JFET gate and a reset drain of an adjacent device. The layer is preferably more lightly doped relative to the substrate, such that sensitivity to longer wavelengths is increased. When used as a pixel in a pixel matrix, the device (and each pixel) may be surrounded by filled trenches extending downward from the top surface of the layer. The trenches may be filled so as to decrease the resistance between the substrate and the layer, and so as to reduce or eliminate cross-talk between pixels.

Claims

1. A photoelectric conversion device, comprising:

(a) a first conductive-type semiconductor substrate and a first conductive-type semiconductor layer formed on said substrate;

(b) a photodiode having a second conductive-type charge-accumulation region formed in the first conductive-type semiconductor layer and structured and arranged to generate and accumulate an electric charge in response to incident light;

(c) a junction field-effect transistor having

(i) a second conductive-type gate region formed in the first conductive-type semiconductor layer,

(ii) a first conductive-type source region formed in the gate region,

(iii) a first conductive-type channel region formed in the gate region, and

(iv) a first conductive-type drain region formed in the first conductive-type semiconductor layer and electrically connected to the first conductive-type semiconductor substrate,

the junction field-effect transistor being structured and arranged so as to output a signal corresponding to the electric charge received by the gate region from the photodiode;

(d) a transfer gate having a gate electrode formed above the first conductive-type semiconductor layer separated therefrom by an insulating film and structured and arranged so as to be able to transfer the electric charge generated and accumulated by the photodiode to the gate region of the junction field-effect transistor;

(e) a reset drain having a second conductive-type charge-drain region formed in the first conductive-type semiconductor layer and structured and arranged so as both to drain an excess electric charge generated by the photodiode and to control an electric potential of the gate region of the junction field-effect transistor;

(f) a first overflow-control region formed in a boundary region between the charge-accumulation region of the photodiode and the charge-drain region of the reset drain in the first conductive-type semiconductor layer and structured and arranged so as to guide the excess electric charge generated by the photodiode to the charge-drain region of the reset drain; and

(g) a first reset gate having a gate electrode formed above the first conductive-type semiconductor layer, separated therefrom by an insulating film, and structured and arranged so as to control the electric connection between the gate region of the junction field-effect transistor and the charge-drain region of the reset drain.

2. The photoelectric conversion device of claim 1, wherein said first conductive-type semiconductor substrate is a high-density first conductive-type semiconductor substrate.

3. The photoelectric conversion device of claim 1, wherein the photodiode is a buried photodiode, the device further comprising a high-density first conductive-type semiconductor layer extending so as to cover the top surface of the second conductive-type charge-accumulation region of the photodiode and the top surface of an area of the first conductive-type semiconductor layer surrounding the photodiode, and wherein the overflow-control region is a first or second conductive-type semiconductor region positioned within the first conductive-type semiconductor layer.

4. A photoelectric conversion apparatus, comprising a plurality of the photoelectric conversion devices of claim 3, arranged in a two-dimensional pixel matrix comprising rows extending in a horizontal scanning direction and columns extending in a vertical scanning direction, each device being a pixel in the pixel matrix, the apparatus further comprising:

(a) a plurality of vertical signal lines, each being connected to the pixels in one of the columns of the pixel matrix so as to receive, from each pixel in the one of the columns, the signal output from the junction field-effect transistor of the respective pixel;

(b) a vertical scanning circuit, electrically connected to each pixel of the pixel matrix and structured and arranged so as to

(i) select any one specific row of the pixel matrix and

(ii) cause the respective pixels in the specific row to output the signal from the respective junction field-effect transistor to the respective vertical signal line; and

(c) a horizontal scanning circuit electrically connected to the vertical signal lines and structured and arranged so as to successively scan the vertical signal lines in the horizontal direction and to transfer each signal from the scanned vertical lines to an associated horizontal signal line.

5. The photoelectric conversion apparatus of claim 4, wherein (a) the first conductive-type semiconductor substrate is a first conductive-type higher-density semiconductor substrate,

(b) the first conductive-type semiconductor layer is a first conductive-type lower-density semiconductor layer formed on the first-conductive type higher-density semiconductor substrate, the first conductive-type lower-density semiconductor layer together with the first-conductive type higher-density semiconductor substrate constituting a base,

(c) the junction field-effect transistor included in each pixel is activated by a voltage applied to the first conductive type drain region via the first conductive-type higher-density semiconductor substrate and the first conductive type lower-density semiconductor layer, in this order, and

(d) the apparatus further comprises filled trenches between any two adjacent pixels, the trenches extending downward into the base from the top surface of the first conductive-type lower-density semiconductor layer, each of the filled trenches being filled with one or more materials so as both to reduce a resistance between the first conductive-type higher-density semiconductor substrate and the first conductive-type drain region of the junction field-effect transistor, and to reduce crosstalk between pixels.

6. The photoelectric conversion apparatus of claim 4, wherein

(a) each pixel further comprises a second overflow-control region,

(b) the charge-accumulation regions of the photodiodes and the charge-drain regions of the reset drains of the photoelectric conversion devices in each column of the pixel matrix alternate in the vertical scanning direction, with a boundary region between each charge-accumulation region and adjacent charge-drain region, and

(c) each first overflow-control region is positioned, within its respective pixel, in the boundary region located between the charge-accumulation region of its respective pixel and the charge-drain region of its respective pixel, and each second overflow-control region is positioned in the boundary region between the charge-accumulation region of one pixel and the charge-drain region of another pixel.

7. A photoelectric conversion apparatus, comprising a plurality of the photoelectric conversion devices of claim 3, arranged in a two-dimensional pixel matrix comprising rows extending in a horizontal scanning direction and columns extending in a vertical scanning direction, each device being a pixel in the pixel matrix, each device further comprising a second reset gate, wherein:

(a) the gate regions of the junction field-effect transistors and the charge-drain regions of the reset drains of the photoelectric conversion devices in each row of the pixel matrix alternate in the horizontal scanning direction, with boundary regions between each of the gate regions and the adjacent charge-drain regions;

(b) each first reset gate is positioned, within its respective pixel, above the boundary region located between the gate region of the junction field-effect transistor of its respective pixel and the charge-drain region of the reset drain of its respective pixel, and each second reset gate is positioned above the boundary region between the gate region of the junction field-effect transistor of one pixel and the charge-drain region of the reset drain of another pixel;

(c) the first and second reset gates in each row are connected in common by a reset gate interconnection in at least the horizontal scanning direction; and

(d) at least some of the charge-drain regions of the reset drains in each row are connected in common by a reset drain interconnection in the horizontal scanning direction.

8. The photoelectric conversion apparatus of claim 7, further comprising an insulating film extending over the reset drains of the pixels, and wherein contact holes are formed in the insulating film over the reset drains, the contact holes being formed over less than all of the reset drains in each row, the less than all reset drains being connected in common to the reset drain interconnection via the contact holes.

9. The photoelectric conversion apparatus of claim 8, wherein the total number of the less than all reset drains in each row is in the range of about ½

to about {fraction (1/20)} of the reset drains in each row.

10. The photoelectric conversion apparatus of claim 7, wherein

(a) each pixel further comprises a second overflow-control region,

(b) the charge-accumulation regions of the photodiodes and the charge-drain regions of the reset drains of the photoelectric conversion devices in each column of the pixel matrix alternate in the vertical scanning direction, with a boundary region between each charge-accumulation region and adjacent charge-drain region, and

(c) each first overflow-control region is positioned, within its respective pixel, in the boundary region located between the charge-accumulation region of its respective pixel and the charge-drain region of its respective pixel, and each second overflow-control region is positioned in the boundary region between the charge-accumulation region of one pixel and the charge-drain region of another pixel.

11. A photoelectric conversion apparatus, comprising a plurality of the photoelectric conversion devices of claim 1, arranged in a two-dimensional pixel matrix having rows extending in a horizontal scanning direction and columns extending in a vertical scanning direction, each device being a pixel in the pixel matrix, the apparatus further comprising:

(a) a plurality of vertical signal lines, each being connected to the pixels in one of the columns of the pixel matrix so as to receive, from each pixel in the one of the columns, the signal output from the junction field effect transistor of the respective pixel;

(b) a vertical scanning circuit, electrically connected to each pixel of the pixel matrix and structured and arranged so as to

(i) select any one specific row of the pixel matrix and

(ii) cause the respective pixels in the specific row to output the signal from the junction field-effect transistor to the respective vertical signal line; and

(c) a horizontal scanning circuit electrically connected to the vertical signal lines and structured and arranged so as to be able to successively scan the vertical signal lines in the horizontal direction and to transfer each signal from the scanned vertical lines to an associated horizontal signal line.

12. The photoelectric conversion apparatus of claim 11, wherein

(a) the first conductive-type semiconductor substrate is a first conductive-type higher-density semiconductor substrate,

(b) the first conductive-type semiconductor layer is a first conductive-type lower-density semiconductor layer formed on the first-conductive type higher-density semiconductor substrate, the first conductive-type lower-density semiconductor layer together with the first-conductive type higher-density semiconductor substrate constituting a base,

(c) the junction field-effect transistor included in each pixel is activated by a voltage applied to the first conductive-type drain region via the first conductive-type higher-density semiconductor substrate and the first conductive type lower-density semiconductor layer, in this order, and

(d) the apparatus further comprises filled trenches between any two adjacent pixels, the trenches extending downward into the base from the top surface of the first conductive-type lower-density semiconductor layer, each of the filled trenches being filled with one or more materials so as both to reduce the resistance between the first conductive-type higher-density semiconductor substrate and the first conductive-type drain region of the junction field-effect transistor, and to reduce crosstalk between pixels.

13. The photoelectric conversion apparatus of claim 11, wherein

(a) each pixel further comprises a second overflow-control region,

(b) the charge-accumulation regions of the photodiodes and the charge-drain regions of the reset drains of the photoelectric conversion devices in each column of the pixel matrix alternate in the vertical scanning direction, with a boundary region between each charge-accumulation region and adjacent charge-drain region, and

(c) each first overflow-control region is positioned, within its respective pixel, in the boundary region located between the charge-accumulation region of its respective pixel and the charge-drain region of its respective pixel, and each second overflow-control region is positioned in the boundary region between the charge-accumulation region of one pixel and the charge-drain region of another pixel.

14. A photoelectric conversion apparatus, comprising a plurality of the photoelectric conversion devices of claim 1, arranged in a two-dimensional pixel matrix having rows extending in a horizontal scanning direction and columns extending in a vertical scanning direction, each device being a pixel in the pixel matrix, each device further comprising a second reset gate, wherein:

(a) the gate regions of the junction field-effect transistors and the charge-drain regions of the reset drains of the photoelectric conversion devices in each row of the pixel matrix alternate in the horizontal scanning direction, with boundary regions between each of the gate regions and the adjacent charge-drain regions;

(b) each first reset gate is positioned, within its respective pixel, above the boundary region located between the gate region of the junction field-effect transistor of its respective pixel and the charge-drain region of the reset drain of its respective pixel, and each second reset gate is positioned above the boundary region between the gate region of the junction field-effect transistor of one pixel and the charge-drain region of the reset drain of another pixel;

(c) the first and second reset gates in each row are connected in common by a reset gate interconnection in at least the horizontal scanning direction; and

(d) at least some of the charge-drain regions of the reset drains in each row are connected in common by a reset drain interconnection in the horizontal scanning direction.

15. The photoelectric conversion apparatus of claim 14, further comprising an insulating film extending over the reset drains of the pixels, and wherein contact holes are formed in the insulating film over the reset drains, the contact holes being formed over less than all of the reset drains in each row, the less than all reset drains being connected in common to the reset drain interconnection via the contact holes.

16. The photoelectric conversion apparatus of claim 15, wherein the total number of the less than all reset drains in each row is in a range of about ½

to about {fraction (1/20)} of the reset drains in each row.

17. The photoelectric conversion apparatus of claim 14, wherein

(a) each pixel further comprises a second overflow-control region,

(b) the charge-accumulation regions of the photodiodes and the charge-drain regions of the reset drains of the photoelectric conversion devices in each column of the pixel matrix alternate in the vertical scanning direction, with a boundary region between each charge-accumulation region and adjacent charge-drain region, and

(c) each first overflow-control region is positioned, within its respective pixel, in the boundary region located between the charge-accumulation region of its respective pixel and the charge-drain region of its respective pixel, and each second overflow-control region is positioned in the boundary region between the charge-accumulation region of one pixel and the charge-drain region of another pixel.