Anti-reflective coating layer for semiconductor device

• US 6,191,030 B1
• Filed: 11/05/1999
• Issued: 02/20/2001
• Est. Priority Date: 04/14/1998
• Status: Expired due to Fees

• Current Assignee: Advanced Micro Devices, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Gallardo, Ernesto A., Pellerin, John G., Subramanian, Ramkumar, Pangrle, Suzette K.
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): Zarneke, David A.
• Application Number:
  US09/434,441
• Time in Patent Office: 473 Days
• Field of Search: 438/624, 438/634, 438/636, 438/637, 438/671, 438/952
• US Class Current: 438/636
• CPC Class Codes: H01L 21/0276 using an anti-reflective coating anti-reflective coating for lithography in general G03F7/09
• CPC Class Codes: Y10S 438/952 Utilizing antireflective layer

Abstract

In a photo-lithographic step for providing contact points to lower layers of a semiconductor device, an anti-reflective coating (ARC) layer, such as FLARE 2.0™, is used to provide a good contact points to an underlayer. After the contact points are made, the anti-reflective coating layer is removed, with the removal being performed in a same step in which a photo-resist is removed from the semiconductor device. In an alternative configuration, the ARC layer remains in the semiconductor device after the fabrication process is competed, thereby acting as an interlayer dielectric during operation of the semiconductor device.

Claims

1. A method of creating contact points to an underlayer of a semiconductor device, the method comprising the steps of:

applying an anti-reflective coating layer onto the underlayer;

applying a silicon-based dielectric hardmask onto the anti-reflective coating layer;

forming at least one via in the anti-reflective coating layer using a sacrificial photo-resist layer and a photo-lithographic process and the silicon-based dielectric hardmask, the at least one via having a first predetermined size in the anti-reflective coating layer and a second predetermined size in the silicon-based dielectric hardmask, the first predetermined size being equal to the second predetermined size,

wherein the anti-reflective coating layer absorbs light during formation, in the manufacturing of the semiconductor device, of the at least one via in the silicon-based dielectric hardmask to thereby have a same size in both the anti-reflective coating layer and the silicon-based dielectric hardmask,

wherein the anti-reflective coating layer and the silicon-based dielectric hardmask collectively form an interlayer dielectric between the underlayer and any metal layers disposed on the silicon-based dielectric hardmask during operation of the semiconductor device,

wherein the silicon-based dielectric hardmask is one of a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer, and

wherein the anti-reflective coating layer is 6000 angstroms in thickness, and the silicon-based dielectric hardmask is 200 angstroms in thickness.

2. The method according to claim 1, further comprising the step of removing the anti-reflective coating layer and the resist using a same etch-removal chemistry.

3. The method according to claim 2, wherein the underlayer is a metal film layer.

4. A method of creating contact points to an underlayer of a semiconductor device, the method comprising the steps of:

applying an anti-reflective coating layer onto the underlayer;

applying a silicon-based dielectric layer onto the anti-reflective coating layer;

forming at least one via in the anti-reflective coating layer and the silicon-based dielectric layer, the at least one via having a first predetermined size in the anti-reflective coating layer and a second predetermined size in the silicon-based dielectric layer, the first predetermined size being equal to the second predetermined size,

wherein the anti-reflective coating layer absorbs light during formation, in the manufacturing of the semiconductor device, of the at least one via in the silicon-based dielectric layer to thereby have a same size in both the anti-reflective coating layer and the silicon-based dielectric layer,

wherein the anti-reflective coating layer and the silicon-based dielectric layer collectively form an interlayer dielectric between the underlayer and any metal layers disposed on the silicon-based dielectric layer during operation of the semiconductor device,

wherein the silicon-based dielectric layer is one of a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer, and

wherein the anti-reflective coating layer is 6000 angstroms in thickness, and the silicon-based dielectric layer is 200 angstroms in thickness.

5. The method according to claim 4, further comprising the step of removing the silicon-based dielectric layer.

6. The method according to claim 4, wherein the underlayer is a metal film layer.

7. The method according to claim 4, wherein the anti-reflective coating layer remains on the semiconductor device after the manufacturing of the device, and serves and an interlayer dielectric during operation of the device.