Formation of shallow trench isolation (STI)

• US 6,194,285 B1
• Filed: 10/04/1999
• Issued: 02/27/2001
• Est. Priority Date: 10/04/1999
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Diaz, Carlos H., Thei, Kong-Bong, Lin, Chung-Te
• Primary Examiner(s): Pham, Long
• Application Number:
  US09/412,653
• Time in Patent Office: 512 Days
• Field of Search: 438/424, 438/435, 438/437
• US Class Current: 438/424
• CPC Class Codes: H01L 21/76237 introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior

Abstract

A method is disclosed to form a shallow trench isolation (STI) having reduced junction leakage by avoiding undercutting near the shoulder of the trench. This is accomplished by using the pad oxide as a screen oxide and not removing it by wet dip etch as is normally practiced. Instead, an extra layer of low temperature oxide is added through thermal growth, and then the resulting composite is removed together with minimal undercutting at the shoulder corners of the trench. Subsequently, gate oxide is grown thermally to complete the forming of the STI.

Claims

1. A method of forming a shallow trench isolation comprising the steps of:

providing a substrate having predetermined active areas and passive regions;

forming a pad oxide layer over said substrate;

forming a nitride layer over said pad oxide layer;

forming organic BARC layer over said nitride layer;

forming a first photoresist layer over said organic BARC layer;

patterning said first photoresist layer to form a first photoresist mask defining openings for at least one shallow trench to be formed in said substrate;

etching said organic BARC layer, said nitride layer and said pad oxide layer through said openings in said first photoresist mask to expose a portion of said substrate;

etching said exposed portion of said substrate to form a shallow trench in said substrate;

removing said first photoresist mask;

forming a conformal layer of oxide on the inside walls of said shallow trench;

filling said shallow trench with isolation oxide;

forming a second photoresist layer over said substrate;

patterning said second photoresist layer to form a second photoresist mask defining reverse openings corresponding to at least one active area in said substrate;

etching said isolation oxide through said reverse openings in said second photoresist mask until said organic BARC layer over said active area is reached;

removing said second photoresist mask over said substrate;

performing chemical mechanical polishing of said isolation oxide until stopping on said organic BARC layer on said substrate;

removing said organic BARC layer and said nitride layer;

performing well implanting over said substrate using pad oxide as a screen oxide;

growing low temperature oxide to anneal the surface of said substrate;

removing said pad oxide and said low temperature oxide; and

growing gate oxide layer over said substrate.

2. The method of claim 1, wherein said substrate comprises silicon.

3. The method of claim 1, wherein said forming said pad oxide layer is accomplished by thermal growth at a temperature between about 850 to 950°

C.

4. The method of claim 3, wherein said pad oxide layer has a thickness between about 100 to 200 angstroms (Å

).

5. The method of claim 1, wherein said forming said nitride layer is accomplished by reacting dichlorosilane (SiCl₂H₂) with ammonia (NH₃) in an LPCVD at a temperature between about 700 to 800°

C.

6. The method of claim 1, wherein said nitride layer has a thickness between about 1000 to 2000 Å

.

7. The method of claim 1, wherein said organic BARC layer has a thickness between about 300 to 500 Å

.

8. The method of claim 1, wherein said first photoresist layer has a thickness between about 4000 to 6000 Å

.

9. The method of claim 1, wherein said etching said organic BARC layer, said nitride layer and said pad oxide layer through said openings is accomplished using gases O₂/N₂.

10. The method of claim 1, wherein said etching said exposed portion of said substrate to form a shallow trench in said substrate is accomplished with a recipe comprising Cl₂ and HBr.

11. The method of claim 1, wherein said forming said conformal layer of oxide is accomplished at a temperature between about 1000 to 1100°

C.

12. The method of claim 1, wherein said conformal layer of oxide has a thickness between about 100 to 350 Å

.

13. The method of claim 1, wherein said isolation oxide comprises SiO₂ formed by employing high-density plasma (HDP) chemical vapor deposition (CVD).

14. The method of claim 1, wherein said second photoresist layer has a thickness between about 1.0 to 1.2 μ

m.

15. The method of claim 1, wherein said etching said isolation oxide through said reverse openings is accomplished with a recipe comprising having high oxide/SiN selectivity.

16. The method of claim 1, wherein said removing said organic BARC layer and said nitride layer is accomplished using gases O₂/N₂.

17. The method of claim 1, wherein said well implanting is accomplished with boron or phosphorous ions at a dosage level between about 1×

10¹² to 1×

10¹⁴ atoms/cm² and energy level between about 20-180 to 15-450 KeV.

18. The method of claim 1, wherein said growing said low temperature oxide is accomplished at a temperature between about 700 to 800°

C.

19. The method of claim 1, wherein said removing said pad oxide and said low temperature oxide is accomplished by wet-etching with hydrogen fluoride (HF).

20. The method of claim 1, wherein said growing said gate oxide layer is accomplished at a temperature between about 650 to 800°

C.

21. The method of claim 1, wherein said gate oxide layer has a thickness between about 15 to 100 Å

.

22. A method of forming a shallow trench isolation comprising:

providing a substrate having predetermined active areas and passive regions;

forming over said substrate a pad oxide layer, a nitride layer, and a organic BARC layer in the given order;

etching through said organic BARC layer, said nitride layer, said pad oxide layer, and into said substrate to form a shallow trench in said substrate;

growing an oxide lining layer on the inside walls of said shallow trench;

depositing isolation oxide in said shallow trench;

performing reverse etching of said isolation oxide over wide active regions on said substrate until organic BARC layer is reached;

performing chemical-mechanical polishing of said isolation oxide until stopping on said organic BARC layer on said substrate;

removing said organic BARC layer and nitride layer;

performing well implanting over said substrate using pad oxide as a screen oxide;

growing low temperature oxide to anneal the surface of said substrate;

removing said pad oxide and said low temperature oxide; and

growing gate oxide layer over said substrate.

23. The method of claim 22, wherein said pad oxide layer has a thickness between about 100 to 200 Å

.

24. The method of claim 22, wherein said nitride layer has a thickness between about 1000 to 2000 Å

.

25. The method of claim 22, wherein said organic BARC layer has a thickness between about 300 to 500 Å

.

26. The method of claim 22, wherein said oxide lining has a thickness between about 200 to 350 Å

.

27. The method of claim 22, wherein said removing said organic BARC layer and nitride layer is accomplished using gases O₂/N₂.

28. The method of claim 22, wherein said performing said well implanting over said substrate using said pad oxide as a screen oxide is accomplished with boron or phosphorous ions at a dosage level between about 1×

10¹² to 1×

10¹⁴ atoms/cm² and energy level between about 20-180 to 15-450 KeV.

29. The method of claim 22, wherein said growing said low temperature oxide to anneal the surface of said substrate is accomplished at a temperature between about 1000 to 1100°

C.

30. The method of claim 22, wherein said low temperature oxide has a thickness between about 20 to 50 Å

.

31. The method of claim 22, wherein said removing said pad oxide and said low temperature oxide is accomplished with HF wet-etch.

32. The method of claim 22, wherein said growing said gate oxide layer is accomplished at a temperature between about 700 to 900°

C.

33. The method of claim 22, wherein said gate oxide layer has a thickness between about 20 to 50 Å

.