Complementary metal oxide semiconductor (CMOS) device comprising thin-film transistors arranged on a glass substrate

• US 6,194,762 B1
• Filed: 12/07/1998
• Issued: 02/27/2001
• Est. Priority Date: 02/09/1996
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Fukunaga, Takeshi, Yamazaki, Shunpei
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): COLEMAN, WILLIAM D
• Application Number:
  US09/206,637
• Time in Patent Office: 813 Days
• Field of Search: 257/336, 257/344, 257/350, 257/49, 257/351, 349/42, 438/149, 438/151, 438/154, 438/157, 438/163
• US Class Current: 257/350
• CPC Class Codes: H01L 2029/7863 with an LDD consisting of more than one lightly doped zone or having a non-homogeneous dopant distribution, e.g. graded LDD
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile

Abstract

In a circuit configuration comprising an n-channel thin-film transistor and a p-channel thin-film transistor integrally produced on a single substrate, a lightly-doped drain (LDD) region is formed selectively in the n-channel thin-film transistor, and damages to semiconductor layers caused when implanting impurity ions are balanced between the n- and p-channel thin-film transistors. This configuration achieves a balance between the n- and p-channel thin-film transistors and thereby provides high characteristics CMOS circuit.

Claims

1. A semiconductor device having at least an n-channel thin film transistor and a p-channel thin film transistor, said semiconductor device comprising:

a first semiconductor island on an insulating surface having at least first source and drain regions and a first channel forming region therebetween, for forming said n-channel thin film transistor, and

a second semiconductor island on the insulating surface having at least second source and drain regions and a second channel forming region therebetween for forming said p-channel thin film transistor,

wherein said second semiconductor island includes a pair of portions adjacent to said second source region and said second drain region respectively, said pair of portions containing n-type and p-type impurities,

wherein said second source and drain regions of said p-channel thin film transistor are doped with only the p-type impurity as an impurity for giving one conductivity type, and

wherein only said first semiconductor island in said n-channel thin film transistor has a lightly-doped region.

3. A semiconductor device according to claim 1 or 2 wherein said portions comprising n- and p-type impurities act only as connecting electrodes to said second source region and said second drain region.

4. A semiconductor device according to claim 1 or 2 wherein said first and second channel forming regions containing an impurity to give either one conductivity type.

5. A semiconductor device according to claim 1 or 2, wherein said first and second semiconductor islands comprise hydrogen and a halogen element.

2. A semiconductor device having at least an n-channel thin film transistor and a p-channel thin film transistor, said device comprising:

said n-channel thin film transistor comprising;

a first semiconductor island having at least first source and drain regions and a first channel forming region therebetween, formed over a substrate,

a first gate electrode adjacent to said first channel forming region with a first insulating layer interposed therebetween,

said first source and drain regions adjacent to a pair of lightly-doped regions,

said p-channel thin film transistor comprising;

a second semiconductor island having at least second source and drain regions and a second channel forming region therebetween, over the substrate;

a second gate electrode adjacent to said second channel forming region with a second insulating layer interposed therebetween,

wherein said second channel forming region directly contact with said second source and drain regions, and

wherein said second semiconductor island includes a pair of portions adjacent to said second source region and said second drain region respectively, said pair of portions containing n- and p-type impurities.

6. A semiconductor device comprising at least an n-channel thin film transistor in an active matrix area and at least an n-channel and p-channel thin film transistors with a complementary configuration in a peripheral driver circuit area, said transistors in said peripheral driver circuit area being for driving said transistors in said active matrix area, wherein

each of said p-channel thin film transistors in peripheral driver circuit comprising:

a semiconductor island formed over an insulating surface,

an insulating layer adjacent to said channel forming region,

a gate electrode adjacent to said channel forming region with said insulating layer interposed therebetween,

a source region and a drain region adjacent to said channel forming region, said source region and said drain region containing only a p-type impurity and directly contacting said channel forming region, and

a pair of portions adjacent to said source region and said drain region respectively, said pair of portions containing n- and p-type impurities.

7. A semiconductor device according to claim 6 wherein said channel forming regions containing an impurity to give either one conductivity type.

8. A semiconductor device according to claim 6 wherein said semiconductor island comprises hydrogen and a halogen element.

9. A semiconductor device according to claim 6 wherein said portions containing n- and p-type impurities act only as connecting electrodes to said source region and said drain region.

10. A semiconductor device comprising at least an n-channel thin film transistor in an active matrix area and at least an n- and p-channel thin film transistors with a complementary configuration in a peripheral driver circuit area, said transistors in said peripheral driver circuit area being for driving said transistors in said active matrix area, wherein

each of said n-channel thin film transistors in an active matrix area and peripheral driver circuit comprising:

a first semiconductor island having at least first source and drain regions and a first channel forming region therebetween, formed over a substrate,

a first gate electrode adjacent to said first channel forming region with a first insulating layer interposed therebetween,

said first source and drain regions adjacent to a pair of lightly-doped regions,

each of said p-channel thin film transistors in said peripheral driver circuit comprising;

a second semiconductor island formed at least second source and drain regions and a second channel forming region therebetween, over the substrate,

a second gate electrode adjacent to said second channel forming region with a second insulating layer interposed therebetween,

wherein said second channel forming region directly contact with said second source and said second drain regions, and

wherein said second semiconductor island includes a pair of portions adjacent to said second source region and said second drain region respectively, said pair of portions containing n- and p-type impurities.

11. A semiconductor device according to claim 10 wherein said second source region and said second drain region of said second semiconductor island are individually interposed between one of said pair of the portions containing n- and p-type impurities and said second channel forming region.

12. A semiconductor device according to claim 10 wherein said portions containing n- and p-type impurities act only as connecting electrodes to said second source region and said second drain region.

13. A semiconductor device according to claim 10 wherein said first and second channel forming regions containing an impurity to give either one conductivity type.

14. A semiconductor device according to claim 10 wherein said first and second semiconductor islands comprises hydrogen and a halogen element.