Complementary metal oxide semiconductor (CMOS) device comprising thin-film transistors arranged on a glass substrate
First Claim
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1. A semiconductor device having at least an n-channel thin film transistor and a p-channel thin film transistor, said semiconductor device comprising:
- a first semiconductor island on an insulating surface having at least first source and drain regions and a first channel forming region therebetween, for forming said n-channel thin film transistor, and a second semiconductor island on the insulating surface having at least second source and drain regions and a second channel forming region therebetween for forming said p-channel thin film transistor, wherein said second semiconductor island includes a pair of portions adjacent to said second source region and said second drain region respectively, said pair of portions containing n-type and p-type impurities, wherein said second source and drain regions of said p-channel thin film transistor are doped with only the p-type impurity as an impurity for giving one conductivity type, and wherein only said first semiconductor island in said n-channel thin film transistor has a lightly-doped region.
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Abstract
In a circuit configuration comprising an n-channel thin-film transistor and a p-channel thin-film transistor integrally produced on a single substrate, a lightly-doped drain (LDD) region is formed selectively in the n-channel thin-film transistor, and damages to semiconductor layers caused when implanting impurity ions are balanced between the n- and p-channel thin-film transistors. This configuration achieves a balance between the n- and p-channel thin-film transistors and thereby provides high characteristics CMOS circuit.
32 Citations
14 Claims
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1. A semiconductor device having at least an n-channel thin film transistor and a p-channel thin film transistor, said semiconductor device comprising:
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a first semiconductor island on an insulating surface having at least first source and drain regions and a first channel forming region therebetween, for forming said n-channel thin film transistor, and a second semiconductor island on the insulating surface having at least second source and drain regions and a second channel forming region therebetween for forming said p-channel thin film transistor, wherein said second semiconductor island includes a pair of portions adjacent to said second source region and said second drain region respectively, said pair of portions containing n-type and p-type impurities, wherein said second source and drain regions of said p-channel thin film transistor are doped with only the p-type impurity as an impurity for giving one conductivity type, and wherein only said first semiconductor island in said n-channel thin film transistor has a lightly-doped region. - View Dependent Claims (3, 4, 5)
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2. A semiconductor device having at least an n-channel thin film transistor and a p-channel thin film transistor, said device comprising:
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said n-channel thin film transistor comprising;
a first semiconductor island having at least first source and drain regions and a first channel forming region therebetween, formed over a substrate, a first gate electrode adjacent to said first channel forming region with a first insulating layer interposed therebetween, said first source and drain regions adjacent to a pair of lightly-doped regions, said p-channel thin film transistor comprising;
a second semiconductor island having at least second source and drain regions and a second channel forming region therebetween, over the substrate;
a second gate electrode adjacent to said second channel forming region with a second insulating layer interposed therebetween, wherein said second channel forming region directly contact with said second source and drain regions, and wherein said second semiconductor island includes a pair of portions adjacent to said second source region and said second drain region respectively, said pair of portions containing n- and p-type impurities.
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6. A semiconductor device comprising at least an n-channel thin film transistor in an active matrix area and at least an n-channel and p-channel thin film transistors with a complementary configuration in a peripheral driver circuit area, said transistors in said peripheral driver circuit area being for driving said transistors in said active matrix area, wherein
each of said p-channel thin film transistors in peripheral driver circuit comprising: -
a semiconductor island formed over an insulating surface, an insulating layer adjacent to said channel forming region, a gate electrode adjacent to said channel forming region with said insulating layer interposed therebetween, a source region and a drain region adjacent to said channel forming region, said source region and said drain region containing only a p-type impurity and directly contacting said channel forming region, and a pair of portions adjacent to said source region and said drain region respectively, said pair of portions containing n- and p-type impurities. - View Dependent Claims (7, 8, 9)
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10. A semiconductor device comprising at least an n-channel thin film transistor in an active matrix area and at least an n- and p-channel thin film transistors with a complementary configuration in a peripheral driver circuit area, said transistors in said peripheral driver circuit area being for driving said transistors in said active matrix area, wherein
each of said n-channel thin film transistors in an active matrix area and peripheral driver circuit comprising: -
a first semiconductor island having at least first source and drain regions and a first channel forming region therebetween, formed over a substrate, a first gate electrode adjacent to said first channel forming region with a first insulating layer interposed therebetween, said first source and drain regions adjacent to a pair of lightly-doped regions, each of said p-channel thin film transistors in said peripheral driver circuit comprising;
a second semiconductor island formed at least second source and drain regions and a second channel forming region therebetween, over the substrate, a second gate electrode adjacent to said second channel forming region with a second insulating layer interposed therebetween, wherein said second channel forming region directly contact with said second source and said second drain regions, and wherein said second semiconductor island includes a pair of portions adjacent to said second source region and said second drain region respectively, said pair of portions containing n- and p-type impurities. - View Dependent Claims (11, 12, 13, 14)
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Specification