Printed circuit board with a multilayer integral thin-film metal resistor and method therefor

• US 6,194,990 B1
• Filed: 03/16/1999
• Issued: 02/27/2001
• Est. Priority Date: 03/16/1999
• Status: Expired due to Fees

• Current Assignee: Motorola Solutions, Inc.
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Dunn, Gregory J., Lee, Tien, Lach, Lawrence
• Primary Examiner(s): EASTHOM, KARL D
• Application Number:
  US09/268,956
• Time in Patent Office: 714 Days
• Field of Search: 338/306, 338/307, 338/309, 338/288, 338/289, 338/319, 338/320, 338/260, 338/254, 338/312, 338/314, 338/61, 338/295
• US Class Current: 338/320
• CPC Class Codes: H05K 1/167 incorporating printed resistors
• CPC Class Codes: H05K 2201/0187 with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
• CPC Class Codes: H05K 2201/0317 Thin film conductor layer; Thin film passive component
• CPC Class Codes: H05K 2201/09509 Blind vias, i.e. vias having one side closed
• CPC Class Codes: H05K 2201/09672 Superposed layout, i.e. in different planes
• CPC Class Codes: H05K 2201/09845 Stepped hole, via, edge, bump or conductor
• CPC Class Codes: H05K 2201/10045 Mounted network component having plural terminals
• CPC Class Codes: H05K 2203/0361 Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
• CPC Class Codes: H05K 3/0023 by exposure and development of a photosensitive insulating layer
• CPC Class Codes: H05K 3/4644 by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602
• CPC Class Codes: Y10T 29/49082 Resistor making

Abstract

A thin-film metal resistor (44) suitable for a multilayer printed circuit board (12), and a method for its fabrication. The resistor (44) generally has a multilayer construction, with the individual layers (34, 38) of the resistor (44) being self-aligned with each other so that a negative mutual inductance is produced that very nearly cancels out the self-inductance of each resistor layer (34, 38). As a result, the resistor (44) has a very low net parasitic inductance. In addition, the multilayer construction of the resistor (44) reduces the area of the circuit board (12) required to accommodate the resistor (44), and as a result reduces the problem of parasitic interactions with other circuit elements on other layers of the circuit board (12).

Claims

1. A printed circuit board comprising:

a substrate;

a first electrically-resistive strip on the substrate, the first electrically-resistive strip having an input end, a perimeter and an output end;

a dielectric layer overlying the first electrically-resistive strip, said dielectric layer being formed of a positive-acting photodielectric material and having a perimeter;

a second electrically-resistive strip on the dielectric layer, the second electrically-resistive strip having an input end, a perimeter, and an output end, the perimeter of the first electrically-resistive strip being superimposed by the perimeter of the second electrically-resistive strip and the perimeter of dielectric layer, and the input end of the first electrically-resistive strip being superimposed by the output end of the second electrically-resistive strip and the output end of the first electrically-resistive strip being superimposed by the input end of the second electrically-resistive strip; and

means for electrically interconnecting the output end of the first electrically-resistive strip and the input end of the second electrically-resistive strip so as to define a resistor path that starts at the input end of the first electrically-resistive strip, follows the first electrically-resistive strip to the output end thereof, continues to the input end of the second electrically-resistive strip through the interconnecting means, and then follows the second electrically-resistive strip to the output end thereof.

2. The printed circuit board according to claim 1, wherein the electrical interconnecting means is a metal interconnect.

3. The printed circuit board according to claim 1, wherein the first and second electrically-resistive strips are rectangular in shape.

4. The printed circuit board according to claim 1, wherein the first and second electrically-resistive strips are serpentine in shape.

5. A printed circuit board having a two-layer thin-film metal resistor comprising a substrate:

a substrate;

a first electrically-resistive strip on the substrate, the first electrically-resistive strip having an input end, an output end, and a perimeter;

first termination on and contacting the input end of the first electrically-resistive strip and a second termination on and contacting the output end of the first electrically-resistive strip;

a dielectric layer overlying the first and second terminations and the first electrically-resistive strip, the dielectric layer being formed of a positive-acting photodielectric material and having a perimeter;

a second electrically-resistive strip on the dielectric layer, the second electrically-resistive strip having an input end, an output end, and a perimeter, the first electrically-resistive strip being superimposed by the second electrically-resistive strip so that the input end of the first electrically-resistive strip is superimposed by the output end of the second electrically-resistive strip, the output end of the first electrically-resistive strip is superimposed by the input end of the second electrically-resistive strip, and the perimeter of the first electrically-resistive strip is superimposed by the perimeter of the second electrically-resistive strip and the perimeter of the dielectric layer;

a third termination on and contacting the input end of the second electrically-resistive strip and a fourth termination on and contacting the output end of the second electrically-resistive strip; and

a plated via electrically interconnecting the second and third terminations so as to define a resistor path that starts at the first termination, follows the first electrically-resistive strip to the second termination, continues to the third termination through the plated via, and then follows the second electrically-resistive strip to the fourth termination.

6. The printed circuit board according to claim 5, wherein the first and second electrically-resistive strips are NiP films.

7. The printed circuit board according to claim 5, wherein the first and second electrically-resistive strips are rectangular in shape.

8. The printed circuit board according to claim 5, wherein the first and second electrically-resistive strips are serpentine in shape.

9. The printed circuit board according to claim 5 wherein the first and second electrically-resistive strips have linewidths that are about five times greater than the thickness of the dielectric layer.